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d540725871
Without this patch, the chacha block counter is not incremented on neon rounds, resulting in incorrect calculations and corrupt packets. This also switches to using `--no-numbered --zero-commit` so that future diffs are smaller. Reported-by: Hans Geiblinger <cybrnook2002@yahoo.com> Reviewed-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Petr Štetiar <ynezz@true.cz> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
206 lines
6.9 KiB
Diff
206 lines
6.9 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Ard Biesheuvel <ardb@kernel.org>
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Date: Fri, 8 Nov 2019 13:22:10 +0100
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Subject: [PATCH] crypto: x86/chacha - expose SIMD ChaCha routine as library
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function
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commit 84e03fa39fbe95a5567d43bff458c6d3b3a23ad1 upstream.
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Wire the existing x86 SIMD ChaCha code into the new ChaCha library
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interface, so that users of the library interface will get the
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accelerated version when available.
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Given that calls into the library API will always go through the
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routines in this module if it is enabled, switch to static keys
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to select the optimal implementation available (which may be none
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at all, in which case we defer to the generic implementation for
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all invocations).
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Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
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---
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arch/x86/crypto/chacha_glue.c | 91 +++++++++++++++++++++++++----------
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crypto/Kconfig | 1 +
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include/crypto/chacha.h | 6 +++
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3 files changed, 73 insertions(+), 25 deletions(-)
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--- a/arch/x86/crypto/chacha_glue.c
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+++ b/arch/x86/crypto/chacha_glue.c
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@@ -21,24 +21,24 @@ asmlinkage void chacha_block_xor_ssse3(u
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asmlinkage void chacha_4block_xor_ssse3(u32 *state, u8 *dst, const u8 *src,
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unsigned int len, int nrounds);
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asmlinkage void hchacha_block_ssse3(const u32 *state, u32 *out, int nrounds);
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-#ifdef CONFIG_AS_AVX2
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+
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asmlinkage void chacha_2block_xor_avx2(u32 *state, u8 *dst, const u8 *src,
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unsigned int len, int nrounds);
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asmlinkage void chacha_4block_xor_avx2(u32 *state, u8 *dst, const u8 *src,
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unsigned int len, int nrounds);
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asmlinkage void chacha_8block_xor_avx2(u32 *state, u8 *dst, const u8 *src,
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unsigned int len, int nrounds);
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-static bool chacha_use_avx2;
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-#ifdef CONFIG_AS_AVX512
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+
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asmlinkage void chacha_2block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
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unsigned int len, int nrounds);
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asmlinkage void chacha_4block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
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unsigned int len, int nrounds);
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asmlinkage void chacha_8block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
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unsigned int len, int nrounds);
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-static bool chacha_use_avx512vl;
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-#endif
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-#endif
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+
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+static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_simd);
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+static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx2);
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+static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx512vl);
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static unsigned int chacha_advance(unsigned int len, unsigned int maxblocks)
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{
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@@ -49,9 +49,8 @@ static unsigned int chacha_advance(unsig
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static void chacha_dosimd(u32 *state, u8 *dst, const u8 *src,
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unsigned int bytes, int nrounds)
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{
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-#ifdef CONFIG_AS_AVX2
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-#ifdef CONFIG_AS_AVX512
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- if (chacha_use_avx512vl) {
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+ if (IS_ENABLED(CONFIG_AS_AVX512) &&
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+ static_branch_likely(&chacha_use_avx512vl)) {
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while (bytes >= CHACHA_BLOCK_SIZE * 8) {
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chacha_8block_xor_avx512vl(state, dst, src, bytes,
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nrounds);
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@@ -79,8 +78,9 @@ static void chacha_dosimd(u32 *state, u8
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return;
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}
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}
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-#endif
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- if (chacha_use_avx2) {
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+
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+ if (IS_ENABLED(CONFIG_AS_AVX2) &&
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+ static_branch_likely(&chacha_use_avx2)) {
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while (bytes >= CHACHA_BLOCK_SIZE * 8) {
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chacha_8block_xor_avx2(state, dst, src, bytes, nrounds);
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bytes -= CHACHA_BLOCK_SIZE * 8;
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@@ -104,7 +104,7 @@ static void chacha_dosimd(u32 *state, u8
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return;
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}
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}
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-#endif
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+
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while (bytes >= CHACHA_BLOCK_SIZE * 4) {
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chacha_4block_xor_ssse3(state, dst, src, bytes, nrounds);
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bytes -= CHACHA_BLOCK_SIZE * 4;
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@@ -123,6 +123,43 @@ static void chacha_dosimd(u32 *state, u8
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}
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}
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+void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)
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+{
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+ state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
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+
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+ if (!static_branch_likely(&chacha_use_simd) || !crypto_simd_usable()) {
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+ hchacha_block_generic(state, stream, nrounds);
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+ } else {
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+ kernel_fpu_begin();
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+ hchacha_block_ssse3(state, stream, nrounds);
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+ kernel_fpu_end();
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+ }
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+}
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+EXPORT_SYMBOL(hchacha_block_arch);
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+
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+void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv)
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+{
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+ state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
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+
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+ chacha_init_generic(state, key, iv);
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+}
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+EXPORT_SYMBOL(chacha_init_arch);
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+
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+void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,
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+ int nrounds)
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+{
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+ state = PTR_ALIGN(state, CHACHA_STATE_ALIGN);
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+
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+ if (!static_branch_likely(&chacha_use_simd) || !crypto_simd_usable() ||
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+ bytes <= CHACHA_BLOCK_SIZE)
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+ return chacha_crypt_generic(state, dst, src, bytes, nrounds);
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+
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+ kernel_fpu_begin();
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+ chacha_dosimd(state, dst, src, bytes, nrounds);
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+ kernel_fpu_end();
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+}
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+EXPORT_SYMBOL(chacha_crypt_arch);
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+
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static int chacha_simd_stream_xor(struct skcipher_request *req,
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const struct chacha_ctx *ctx, const u8 *iv)
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{
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@@ -143,7 +180,8 @@ static int chacha_simd_stream_xor(struct
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if (nbytes < walk.total)
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nbytes = round_down(nbytes, walk.stride);
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- if (!crypto_simd_usable()) {
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+ if (!static_branch_likely(&chacha_use_simd) ||
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+ !crypto_simd_usable()) {
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chacha_crypt_generic(state, walk.dst.virt.addr,
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walk.src.virt.addr, nbytes,
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ctx->nrounds);
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@@ -246,18 +284,21 @@ static struct skcipher_alg algs[] = {
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static int __init chacha_simd_mod_init(void)
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{
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if (!boot_cpu_has(X86_FEATURE_SSSE3))
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- return -ENODEV;
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+ return 0;
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-#ifdef CONFIG_AS_AVX2
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- chacha_use_avx2 = boot_cpu_has(X86_FEATURE_AVX) &&
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- boot_cpu_has(X86_FEATURE_AVX2) &&
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- cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL);
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-#ifdef CONFIG_AS_AVX512
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- chacha_use_avx512vl = chacha_use_avx2 &&
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- boot_cpu_has(X86_FEATURE_AVX512VL) &&
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- boot_cpu_has(X86_FEATURE_AVX512BW); /* kmovq */
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-#endif
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-#endif
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+ static_branch_enable(&chacha_use_simd);
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+
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+ if (IS_ENABLED(CONFIG_AS_AVX2) &&
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+ boot_cpu_has(X86_FEATURE_AVX) &&
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+ boot_cpu_has(X86_FEATURE_AVX2) &&
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+ cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
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+ static_branch_enable(&chacha_use_avx2);
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+
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+ if (IS_ENABLED(CONFIG_AS_AVX512) &&
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+ boot_cpu_has(X86_FEATURE_AVX512VL) &&
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+ boot_cpu_has(X86_FEATURE_AVX512BW)) /* kmovq */
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+ static_branch_enable(&chacha_use_avx512vl);
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+ }
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return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
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}
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--- a/crypto/Kconfig
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+++ b/crypto/Kconfig
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@@ -1418,6 +1418,7 @@ config CRYPTO_CHACHA20_X86_64
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depends on X86 && 64BIT
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select CRYPTO_BLKCIPHER
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select CRYPTO_LIB_CHACHA_GENERIC
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+ select CRYPTO_ARCH_HAVE_LIB_CHACHA
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help
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SSSE3, AVX2, and AVX-512VL optimized implementations of the ChaCha20,
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XChaCha20, and XChaCha12 stream ciphers.
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--- a/include/crypto/chacha.h
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+++ b/include/crypto/chacha.h
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@@ -25,6 +25,12 @@
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#define CHACHA_BLOCK_SIZE 64
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#define CHACHAPOLY_IV_SIZE 12
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+#ifdef CONFIG_X86_64
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+#define CHACHA_STATE_WORDS ((CHACHA_BLOCK_SIZE + 12) / sizeof(u32))
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+#else
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+#define CHACHA_STATE_WORDS (CHACHA_BLOCK_SIZE / sizeof(u32))
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+#endif
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+
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/* 192-bit nonce, then 64-bit stream position */
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#define XCHACHA_IV_SIZE 32
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