openwrt/target/linux/ramips/dts/rt3352.dtsi
Maxim Anisimov 88501f82f5 ramips: dts: rt3352: reset FE and ESW cores together
Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.

Fixes: 60fadae62b ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>

[Provide commit description, split into logical changes]
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>

(cherry picked from commit 8d75b1de0f)
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
2024-01-05 23:32:59 +01:00

402 lines
6.9 KiB
Plaintext

/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ralink,rt3352-soc";
aliases {
spi0 = &spi0;
spi1 = &spi1;
serial0 = &uartlite;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "mips,mips24KEc";
reg = <0>;
};
};
chosen {
bootargs = "console=ttyS0,57600";
};
cpuintc: cpuintc {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
palmbus: palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc: sysc@0 {
compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc", "syscon";
reg = <0x0 0x100>;
};
timer: timer@100 {
compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
reg = <0x100 0x20>;
interrupt-parent = <&intc>;
interrupts = <1>;
};
watchdog: watchdog@120 {
compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
reg = <0x120 0x10>;
resets = <&rstctrl 8>;
reset-names = "wdt";
interrupt-parent = <&intc>;
interrupts = <1>;
};
intc: intc@200 {
compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
memc: memc@300 {
compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&rstctrl 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
uart: uart@500 {
compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
resets = <&rstctrl 12>;
reset-names = "uart";
interrupt-parent = <&intc>;
interrupts = <5>;
reg-shift = <2>;
status = "disabled";
};
gpio0: gpio@600 {
compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <24>;
ralink,gpio-base = <0>;
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
resets = <&rstctrl 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
};
gpio1: gpio@638 {
compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
reg = <0x638 0x24>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
ralink,gpio-base = <24>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
status = "disabled";
};
gpio2: gpio@660 {
compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
reg = <0x660 0x24>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <6>;
ralink,gpio-base = <40>;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
status = "disabled";
};
i2c@900 {
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
resets = <&rstctrl 16>;
reset-names = "i2c";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
};
i2s@a00 {
compatible = "ralink,rt3352-i2s";
reg = <0xa00 0x100>;
resets = <&rstctrl 17>;
reset-names = "i2s";
interrupt-parent = <&intc>;
interrupts = <10>;
txdma-req = <2>;
rxdma-req = <3>;
dmas = <&gdma 4>,
<&gdma 6>;
dma-names = "tx", "rx";
status = "disabled";
};
spi0: spi@b00 {
compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
reg = <0xb00 0x40>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&rstctrl 18>;
reset-names = "spi";
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>;
status = "disabled";
};
spi1: spi@b40 {
compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
reg = <0xb40 0x60>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&rstctrl 18>;
reset-names = "spi";
pinctrl-names = "default";
pinctrl-0 = <&spi_cs1>;
status = "disabled";
};
uartlite: uartlite@c00 {
compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
resets = <&rstctrl 19>;
reset-names = "uartl";
interrupt-parent = <&intc>;
interrupts = <12>;
reg-shift = <2>;
pinctrl-names = "default";
pinctrl-0 = <&uartlite_pins>;
};
gdma: gdma@2800 {
compatible = "ralink,rt3883-gdma";
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
reset-names = "dma";
interrupt-parent = <&intc>;
interrupts = <7>;
#dma-cells = <1>;
#dma-channels = <16>;
#dma-requests = <16>;
status = "disabled";
};
};
pinctrl: pinctrl {
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinctrl0 {
};
i2c_pins: i2c_pins {
i2c_pins {
groups = "i2c";
function = "i2c";
};
};
mdio_pins: mdio {
mdio {
groups = "mdio";
function = "mdio";
};
};
rgmii_pins: rgmii {
rgmii {
groups = "rgmii";
function = "rgmii";
};
};
spi_pins: spi_pins {
spi_pins {
groups = "spi";
function = "spi";
};
};
spi_cs1: spi1 {
spi1 {
groups = "spi_cs1";
function = "spi_cs1";
};
};
uartlite_pins: uartlite {
uart {
groups = "uartlite";
function = "uartlite";
};
};
};
rstctrl: rstctrl {
compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
#reset-cells = <1>;
};
clkctrl: clkctrl {
compatible = "ralink,rt2880-clock";
#clock-cells = <1>;
};
ethernet: ethernet@10100000 {
compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
reg = <0x10100000 0x10000>;
resets = <&rstctrl 21>, <&rstctrl 23>;
reset-names = "fe", "esw";
interrupt-parent = <&cpuintc>;
interrupts = <5>;
mediatek,switch = <&esw>;
};
esw: esw@10110000 {
compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>;
resets = <&rstctrl 24>;
reset-names = "ephy";
interrupt-parent = <&intc>;
interrupts = <17>;
};
usbphy: usbphy {
compatible = "ralink,rt3352-usbphy";
#phy-cells = <0>;
ralink,sysctl = <&sysc>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 18 &clkctrl 20>;
clock-names = "host", "device";
};
wmac: wmac@10180000 {
compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
reg = <0x10180000 0x40000>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;
ralink,eeprom = "soc_wmac.eeprom";
};
ehci: ehci@101c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "generic-ehci";
reg = <0x101c0000 0x1000>;
phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;
interrupts = <18>;
status = "disabled";
ehci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
ohci: ohci@101c1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "generic-ohci";
reg = <0x101c1000 0x1000>;
phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;
interrupts = <18>;
status = "disabled";
ohci_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};