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78858e5d6c
In the past few years, we have received several reports about SPI
Flash not working properly. This is caused by excessively fast
clock frequency. It's really annoying to fix them one by one. Let's
reduce these aggressive frequencies to 50 MHz. This is a safe and
suggested value in the vendor SDK.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
(cherry picked from commit 73eeac49be)
Link: https://github.com/openwrt/openwrt/pull/15919
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
170 lines
2.7 KiB
Plaintext
170 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "winstars,ws-wn583a6", "mediatek,mt7621-soc";
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model = "Winstars WS-WN583A6";
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aliases {
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led-boot = &led_status_red;
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led-failsafe = &led_status_red;
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led-running = &led_status_blue;
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led-upgrade = &led_status_red;
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};
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leds {
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compatible = "gpio-leds";
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night_light_white {
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label = "white:night_light";
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gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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};
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led_status_blue: status_blue {
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label = "blue:status";
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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};
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status_amber {
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label = "amber:status";
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gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
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};
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led_status_red: status_red {
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label = "red:status";
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gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x7b0000>;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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};
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};
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ðernet {
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pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_e000>;
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nvmem-cell-names = "mac-address";
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "wan";
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nvmem-cells = <&macaddr_factory_e006>;
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nvmem-cell-names = "mac-address";
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};
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port@1 {
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status = "okay";
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label = "lan";
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};
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};
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};
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&state_default {
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gpio {
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groups = "jtag", "wdt", "rgmii2";
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function = "gpio";
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};
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};
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&xhci {
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status = "disabled";
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_e000: macaddr@e000 {
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reg = <0xe000 0x6>;
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};
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macaddr_factory_e006: macaddr@e006 {
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reg = <0xe006 0x6>;
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};
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};
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