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920eaab1d8
Marvell mv88e6xxx switch series cannot perform MAC learning from
CPU-injected (FROM_CPU) DSA frames, which results in 2 issues.
- excessive flooding, due to the fact that DSA treats those addresses
as unknown
- the risk of stale routes, which can lead to temporary packet loss
Backport those patch series from netdev mailing list, which solve these
issues by adding and clearing static entries to the switch's FDB.
Add a hack patch to set default VID to 1 in port_fdb_{add,del}. Otherwise
the static entries will be added to the switch's private FDB if VLAN
filtering disabled, which will not work.
The switch may generate an "ATU violation" warning when a client moves
from the CPU port to a switch port because the static ATU entry added by
DSA core still points to the CPU port. DSA core will then clear the static
entry so it is not fatal. Disable the warning so it will not confuse users.
Link: https://lore.kernel.org/netdev/20210106095136.224739-1-olteanv@gmail.com/
Link: https://lore.kernel.org/netdev/20210116012515.3152-1-tobias@waldekranz.com/
Ref: https://gitlab.nic.cz/turris/turris-build/-/issues/165
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
28 lines
1.1 KiB
Diff
28 lines
1.1 KiB
Diff
From: Tobias Waldekranz <tobias@waldekranz.com>
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Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port
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Date: Sat, 16 Jan 2021 02:25:15 +0100
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Archived-At: <https://lore.kernel.org/netdev/20210116012515.3152-8-tobias@waldekranz.com/>
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While the hardware is capable of performing learning on the CPU port,
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it requires alot of additions to the bridge's forwarding path in order
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to handle multi-destination traffic correctly.
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Until that is in place, opt for the next best thing and let DSA sync
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the relevant addresses down to the hardware FDB.
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Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
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---
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drivers/net/dsa/mv88e6xxx/chip.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/drivers/net/dsa/mv88e6xxx/chip.c
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+++ b/drivers/net/dsa/mv88e6xxx/chip.c
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@@ -5405,6 +5405,7 @@ static int mv88e6xxx_register_switch(str
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ds->ops = &mv88e6xxx_switch_ops;
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ds->ageing_time_min = chip->info->age_time_coeff;
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ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
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+ ds->assisted_learning_on_cpu_port = true;
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dev_set_drvdata(dev, ds);
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