mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 01:11:14 +00:00
9261e7447e
This makes the patches which were just copied in the previous commit apply on top of kernel 4.19. The patches in the backports-4.19 folder were checked if they are really in kernel 4.19 based on the title and only removed if they were found in the upstream kernel. The following additional patches form the pending folder went into upstream Linux 4.19: pending-4.19/171-usb-dwc2-Fix-inefficient-copy-of-unaligned-buffers.patch pending-4.19/190-2-5-e1000e-Fix-wrong-comment-related-to-link-detection.patch pending-4.19/478-mtd-spi-nor-Add-support-for-XM25QH64A-and-XM25QH128A.patch pending-4.19/479-mtd-spi-nor-add-eon-en25qh32.patch pending-4.19/950-tty-serial-exar-generalize-rs485-setup.patch pending-4.19/340-MIPS-mm-remove-mips_dma_mapping_error.patch Bigger changes were introduced to the m25p80 spi nor driver, as far as I saw it in the new code, it now has the functionality provided in this patch: pending-4.19/450-mtd-m25p80-allow-fallback-from-spi_flash_read-to-reg.patch Part of this patch went upstream independent of OpenWrt: hack-4.19/220-gc_sections.patch This patch was reworked to match the changes done upstream. The MIPS DMA API changed a lot, this patch was rewritten to match the new DMA handling: pending-4.19/341-MIPS-mm-remove-no-op-dma_map_ops-where-possible.patch I did bigger manual changes to the following patches and I am not 100% sure if they are all correct: pending-4.19/0931-w1-gpio-fix-problem-with-platfom-data-in-w1-gpio.patch pending-4.19/411-mtd-partial_eraseblock_write.patch pending-4.19/600-netfilter_conntrack_flush.patch pending-4.19/611-netfilter_match_bypass_default_table.patch pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch hack-4.19/211-host_tools_portability.patch hack-4.19/221-module_exports.patch hack-4.19/321-powerpc_crtsavres_prereq.patch hack-4.19/902-debloat_proc.patch This is based on patchset from Marko Ratkaj <marko.ratkaj@sartura.hr> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
63 lines
2.3 KiB
Diff
63 lines
2.3 KiB
Diff
From: Gabor Juhos <juhosg@openwrt.org>
|
|
Subject: debloat: add kernel config option to disabling common PCI quirks
|
|
|
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|
---
|
|
drivers/pci/Kconfig | 6 ++++++
|
|
drivers/pci/quirks.c | 6 ++++++
|
|
2 files changed, 12 insertions(+)
|
|
|
|
--- a/drivers/pci/Kconfig
|
|
+++ b/drivers/pci/Kconfig
|
|
@@ -89,6 +89,13 @@ config XEN_PCIDEV_FRONTEND
|
|
The PCI device frontend driver allows the kernel to import arbitrary
|
|
PCI devices from a PCI backend to support PCI driver domains.
|
|
|
|
+config PCI_DISABLE_COMMON_QUIRKS
|
|
+ bool "PCI disable common quirks"
|
|
+ depends on PCI
|
|
+ help
|
|
+ If you don't know what to do here, say N.
|
|
+
|
|
+
|
|
config PCI_ATS
|
|
bool
|
|
|
|
--- a/drivers/pci/quirks.c
|
|
+++ b/drivers/pci/quirks.c
|
|
@@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct
|
|
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
|
|
PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
|
|
|
|
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
|
|
/*
|
|
* The Mellanox Tavor device gives false positive parity errors. Mark this
|
|
* device with a broken_parity_status to allow PCI scanning code to "skip"
|
|
@@ -3135,6 +3136,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
|
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
|
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
|
|
|
|
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
|
|
+
|
|
/*
|
|
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
|
|
* To work around this, query the size it should be configured to by the
|
|
@@ -3160,6 +3163,8 @@ static void quirk_intel_ntb(struct pci_d
|
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
|
|
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
|
|
|
|
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
|
|
+
|
|
/*
|
|
* Some BIOS implementations leave the Intel GPU interrupts enabled, even
|
|
* though no one is handling them (e.g., if the i915 driver is never
|
|
@@ -3198,6 +3203,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
|
|
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
|
|
|
|
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
|
|
+
|
|
/*
|
|
* PCI devices which are on Intel chips can skip the 10ms delay
|
|
* before entering D3 mode.
|