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openwrt/target/linux/brcm2708/patches-4.19/950-0637-spi-devicetree-add-overlays-for-spi-3-to-6.patch
Álvaro Fernández Rojas 19226502bf brcm2708: update to latest patches from the RPi foundation 
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-08-02 18:51:32 +02:00

582 lines
16 KiB
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From 2965d0b1d0b91c199d7468aa89874a9b462fd924 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Sun, 12 May 2019 16:17:08 +0000
Subject: [PATCH 637/725] spi: devicetree: add overlays for spi 3 to 6
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
arch/arm/boot/dts/overlays/Makefile | 8 ++
arch/arm/boot/dts/overlays/README | 104 ++++++++++++++++++
.../boot/dts/overlays/spi3-1cs-overlay.dts | 44 ++++++++
.../boot/dts/overlays/spi3-2cs-overlay.dts | 56 ++++++++++
.../boot/dts/overlays/spi4-1cs-overlay.dts | 44 ++++++++
.../boot/dts/overlays/spi4-2cs-overlay.dts | 56 ++++++++++
.../boot/dts/overlays/spi5-1cs-overlay.dts | 44 ++++++++
.../boot/dts/overlays/spi5-2cs-overlay.dts | 56 ++++++++++
.../boot/dts/overlays/spi6-1cs-overlay.dts | 44 ++++++++
.../boot/dts/overlays/spi6-2cs-overlay.dts | 56 ++++++++++
10 files changed, 512 insertions(+)
create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -144,6 +144,14 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
spi2-1cs.dtbo \
spi2-2cs.dtbo \
spi2-3cs.dtbo \
+ spi3-1cs.dtbo \
+ spi3-2cs.dtbo \
+ spi4-1cs.dtbo \
+ spi4-2cs.dtbo \
+ spi5-1cs.dtbo \
+ spi5-2cs.dtbo \
+ spi6-1cs.dtbo \
+ spi6-2cs.dtbo \
ssd1306.dtbo \
superaudioboard.dtbo \
sx150x.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -2085,6 +2085,110 @@ Params: cs0_pin GPIO pin
is 'okay' or enabled).
+Name: spi3-1cs
+Info: Enables spi3 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin number for the CS line and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi3-1cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev3.0 (default
+ is 'on' or enabled).
+
+
+Name: spi3-2cs
+Info: Enables spi3 with two chip select (CS) lines and associated spidev
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi3-2cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
+ cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev3.0 (default
+ is 'on' or enabled).
+ cs1_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev3.1 (default
+ is 'on' or enabled).
+
+
+Name: spi4-1cs
+Info: Enables spi4 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin number for the CS line and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi4-1cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev4.0 (default
+ is 'on' or enabled).
+
+
+Name: spi4-2cs
+Info: Enables spi4 with two chip select (CS) lines and associated spidev
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi4-2cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
+ cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev4.0 (default
+ is 'on' or enabled).
+ cs1_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev4.1 (default
+ is 'on' or enabled).
+
+
+Name: spi5-1cs
+Info: Enables spi5 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin numbers for the CS lines and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi5-1cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev5.0 (default
+ is 'on' or enabled).
+
+
+Name: spi5-2cs
+Info: Enables spi5 with two chip select (CS) lines and associated spidev
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi5-2cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
+ cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev5.0 (default
+ is 'on' or enabled).
+ cs1_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev5.1 (default
+ is 'on' or enabled).
+
+
+Name: spi6-1cs
+Info: Enables spi6 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin number for the CS line and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi6-1cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev6.0 (default
+ is 'on' or enabled).
+
+
+Name: spi6-2cs
+Info: Enables spi6 with two chip select (CS) lines and associated spidev
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
+ creation are configurable.
+Load: dtoverlay=spi6-2cs,<param>=<val>
+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
+ cs1_pin GPIO pin for CS1 (default 27 - BCM SPI6_CE1).
+ cs0_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev6.0 (default
+ is 'on' or enabled).
+ cs1_spidev Set to 'off' to prevent the creation of a
+ userspace device node /dev/spidev6.1 (default
+ is 'on' or enabled).
+
+
Name: ssd1306
Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer.
Load: dtoverlay=ssd1306,<param>=<val>
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
@@ -0,0 +1,44 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi3_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <0>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi3>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
+ cs-gpios = <&gpio 0 1>;
+ status = "okay";
+
+ spidev3_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs0_spidev = <&spidev3_0>,"status";
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
@@ -0,0 +1,56 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi3_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <0 24>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi3>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
+ cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
+ status = "okay";
+
+ spidev3_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+
+ spidev3_1: spidev@1 {
+ compatible = "spidev";
+ reg = <1>; /* CE1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs1_pin = <&frag0>,"brcm,pins:4",
+ <&frag1>,"cs-gpios:16";
+ cs0_spidev = <&spidev3_0>,"status";
+ cs1_spidev = <&spidev3_1>,"status";
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
@@ -0,0 +1,44 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi4_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <4>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi4>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
+ cs-gpios = <&gpio 4 1>;
+ status = "okay";
+
+ spidev4_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs0_spidev = <&spidev4_0>,"status";
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
@@ -0,0 +1,56 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi4_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <4 25>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi4>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
+ cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
+ status = "okay";
+
+ spidev4_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+
+ spidev4_1: spidev@1 {
+ compatible = "spidev";
+ reg = <1>; /* CE1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs1_pin = <&frag0>,"brcm,pins:4",
+ <&frag1>,"cs-gpios:16";
+ cs0_spidev = <&spidev4_0>,"status";
+ cs1_spidev = <&spidev4_1>,"status";
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
@@ -0,0 +1,44 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi5_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <12>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi5>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
+ cs-gpios = <&gpio 12 1>;
+ status = "okay";
+
+ spidev5_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs0_spidev = <&spidev5_0>,"status";
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
@@ -0,0 +1,56 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi5_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <12 26>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi5>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
+ cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
+ status = "okay";
+
+ spidev5_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+
+ spidev5_1: spidev@1 {
+ compatible = "spidev";
+ reg = <1>; /* CE1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs1_pin = <&frag0>,"brcm,pins:4",
+ <&frag1>,"cs-gpios:16";
+ cs0_spidev = <&spidev5_0>,"status";
+ cs1_spidev = <&spidev5_1>,"status";
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
@@ -0,0 +1,44 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi6_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <18>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi6>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
+ cs-gpios = <&gpio 18 1>;
+ status = "okay";
+
+ spidev6_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs0_spidev = <&spidev6_0>,"status";
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
@@ -0,0 +1,56 @@
+/dts-v1/;
+/plugin/;
+
+
+/ {
+ compatible = "brcm,bcm2838";
+
+ fragment@0 {
+ target = <&spi6_cs_pins>;
+ frag0: __overlay__ {
+ brcm,pins = <18 27>;
+ brcm,function = <1>; /* output */
+ };
+ };
+
+ fragment@1 {
+ target = <&spi6>;
+ frag1: __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
+ cs-gpios = <&gpio 18 1>, <&gpio 27 1>;
+ status = "okay";
+
+ spidev6_0: spidev@0 {
+ compatible = "spidev";
+ reg = <0>; /* CE0 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+
+ spidev6_1: spidev@1 {
+ compatible = "spidev";
+ reg = <1>; /* CE1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <125000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ __overrides__ {
+ cs0_pin = <&frag0>,"brcm,pins:0",
+ <&frag1>,"cs-gpios:4";
+ cs1_pin = <&frag0>,"brcm,pins:4",
+ <&frag1>,"cs-gpios:16";
+ cs0_spidev = <&spidev6_0>,"status";
+ cs1_spidev = <&spidev6_1>,"status";
+ };
+};
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