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54 lines
1.5 KiB
Diff
54 lines
1.5 KiB
Diff
From 372fa27d07f66f97a4bf45621c1b840ce8417a85 Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Mon, 23 Aug 2021 16:19:15 +0300
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Subject: [PATCH 226/247] ARM: dts: at91: sama7g5: add shdwc node
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Add shutdown controller node and enable it.
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Link: https://lore.kernel.org/r/20210823131915.23857-5-claudiu.beznea@microchip.com
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---
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arch/arm/boot/dts/at91-sama7g5ek.dts | 9 +++++++++
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arch/arm/boot/dts/sama7g5.dtsi | 11 +++++++++++
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2 files changed, 20 insertions(+)
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--- a/arch/arm/boot/dts/at91-sama7g5ek.dts
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+++ b/arch/arm/boot/dts/at91-sama7g5ek.dts
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@@ -634,6 +634,15 @@
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pinctrl-0 = <&pinctrl_sdmmc2_default>;
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};
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+&shdwc {
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+ atmel,shdwc-debouncer = <976>;
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+ status = "okay";
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+
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+ input@0 {
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+ reg = <0>;
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+ };
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+};
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+
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&spdifrx {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdifrx_default>;
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--- a/arch/arm/boot/dts/sama7g5.dtsi
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+++ b/arch/arm/boot/dts/sama7g5.dtsi
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@@ -122,6 +122,17 @@
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clock-names = "td_slck", "md_slck", "main_xtal";
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};
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+ shdwc: shdwc@e001d010 {
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+ compatible = "microchip,sama7g5-shdwc", "syscon";
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+ reg = <0xe001d010 0x10>;
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+ clocks = <&clk32k 0>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ atmel,wakeup-rtc-timer;
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+ atmel,wakeup-rtt-timer;
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+ status = "disabled";
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+ };
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+
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rtt: rtt@e001d020 {
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compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
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reg = <0xe001d020 0x30>;
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