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100 lines
3.7 KiB
Diff
100 lines
3.7 KiB
Diff
From 8c19aa14b8303a0e7c4bae42f3f00f9a2a65b0db Mon Sep 17 00:00:00 2001
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From: Eugen Hristev <eugen.hristev@microchip.com>
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Date: Tue, 13 Apr 2021 12:57:11 +0200
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Subject: [PATCH 169/247] media: atmel: atmel-isc: add HIS to register offsets
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The HIS submodule is a part of the atmel-isc pipeline, and stands for
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Histogram. This module performs a color histogram that can be read and used
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by the main processor.
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Add his to the reg offsets struct.
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This will allow different products to have a different reg offset for this
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particular module.
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Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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---
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drivers/media/platform/atmel/atmel-isc-base.c | 11 +++++++----
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drivers/media/platform/atmel/atmel-isc-regs.h | 2 ++
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drivers/media/platform/atmel/atmel-isc.h | 2 ++
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drivers/media/platform/atmel/atmel-sama5d2-isc.c | 1 +
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4 files changed, 12 insertions(+), 4 deletions(-)
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--- a/drivers/media/platform/atmel/atmel-isc-base.c
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+++ b/drivers/media/platform/atmel/atmel-isc-base.c
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@@ -686,12 +686,13 @@ static void isc_set_histogram(struct isc
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struct isc_ctrls *ctrls = &isc->ctrls;
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if (enable) {
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- regmap_write(regmap, ISC_HIS_CFG,
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+ regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his,
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ISC_HIS_CFG_MODE_GR |
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(isc->config.sd_format->cfa_baycfg
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<< ISC_HIS_CFG_BAYSEL_SHIFT) |
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ISC_HIS_CFG_RAR);
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- regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_EN);
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+ regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his,
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+ ISC_HIS_CTRL_EN);
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regmap_write(regmap, ISC_INTEN, ISC_INT_HISDONE);
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ctrls->hist_id = ISC_HIS_CFG_MODE_GR;
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isc_update_profile(isc);
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@@ -700,7 +701,8 @@ static void isc_set_histogram(struct isc
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ctrls->hist_stat = HIST_ENABLED;
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} else {
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regmap_write(regmap, ISC_INTDIS, ISC_INT_HISDONE);
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- regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_DIS);
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+ regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his,
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+ ISC_HIS_CTRL_DIS);
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ctrls->hist_stat = HIST_DISABLED;
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}
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@@ -1836,7 +1838,8 @@ static void isc_awb_work(struct work_str
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ctrls->awb = ISC_WB_NONE;
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}
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}
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- regmap_write(regmap, ISC_HIS_CFG, hist_id | baysel | ISC_HIS_CFG_RAR);
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+ regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his,
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+ hist_id | baysel | ISC_HIS_CFG_RAR);
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isc_update_profile(isc);
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/* if awb has been disabled, we don't need to start another histogram */
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if (ctrls->awb)
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--- a/drivers/media/platform/atmel/atmel-isc-regs.h
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+++ b/drivers/media/platform/atmel/atmel-isc-regs.h
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@@ -224,6 +224,8 @@
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#define ISC_RLP_CFG_MODE_YYCC_LIMITED 0xc
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#define ISC_RLP_CFG_MODE_MASK GENMASK(3, 0)
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+/* Offset for HIS register specific to sama5d2 product */
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+#define ISC_SAMA5D2_HIS_OFFSET 0
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/* Histogram Control Register */
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#define ISC_HIS_CTRL 0x000003d4
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--- a/drivers/media/platform/atmel/atmel-isc.h
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+++ b/drivers/media/platform/atmel/atmel-isc.h
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@@ -150,6 +150,7 @@ struct isc_ctrls {
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* @sub422: Offset for the SUB422 register
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* @sub420: Offset for the SUB420 register
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* @rlp: Offset for the RLP register
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+ * @his: Offset for the HIS related registers
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*/
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struct isc_reg_offsets {
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u32 csc;
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@@ -157,6 +158,7 @@ struct isc_reg_offsets {
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u32 sub422;
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u32 sub420;
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u32 rlp;
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+ u32 his;
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};
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/*
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--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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+++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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@@ -256,6 +256,7 @@ static int atmel_isc_probe(struct platfo
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isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET;
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isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
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isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
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+ isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET;
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/* sama5d2-isc - 8 bits per beat */
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isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
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