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138 lines
3.9 KiB
Diff
138 lines
3.9 KiB
Diff
From 635f800995e4ea2a18ce7520d816dab018ce091f Mon Sep 17 00:00:00 2001
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From: Sean Wang <sean.wang@mediatek.com>
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Date: Wed, 18 Oct 2017 16:28:44 +0800
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Subject: [PATCH 118/224] soc: mediatek: pwrap: add pwrap_write32 for writing
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in 32-bit mode
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Some regulators such as MediaTek MT6380 also has to be written in
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32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write
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into pwrap_write16 and one additional function pointer is introduced
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for increasing flexibility allowing the determination which mode is
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used by the pwrap slave detection through device tree.
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Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
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Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
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Signed-off-by: Sean Wang <sean.wang@mediatek.com>
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Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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drivers/soc/mediatek/mtk-pmic-wrap.c | 70 +++++++++++++++++++++++++++---------
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1 file changed, 54 insertions(+), 16 deletions(-)
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diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
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index 06930e2ebe4c..2d3a8faae124 100644
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--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
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+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
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@@ -507,6 +507,7 @@ struct pwrap_slv_type {
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* which type is used by the detection through device tree.
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*/
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int (*pwrap_read)(struct pmic_wrapper *wrp, u32 adr, u32 *rdata);
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+ int (*pwrap_write)(struct pmic_wrapper *wrp, u32 adr, u32 wdata);
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};
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struct pmic_wrapper {
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@@ -601,22 +602,6 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
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} while (1);
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}
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-static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
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-{
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- int ret;
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-
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- ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
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- if (ret) {
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- pwrap_leave_fsm_vldclr(wrp);
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- return ret;
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- }
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-
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- pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
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- PWRAP_WACS2_CMD);
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-
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- return 0;
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-}
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-
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static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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{
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int ret;
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@@ -673,6 +658,56 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
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return wrp->slave->pwrap_read(wrp, adr, rdata);
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}
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+static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
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+{
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+ int ret;
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+
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+ ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
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+ if (ret) {
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+ pwrap_leave_fsm_vldclr(wrp);
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+ return ret;
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+ }
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+
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+ pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
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+ PWRAP_WACS2_CMD);
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+
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+ return 0;
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+}
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+
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+static int pwrap_write32(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
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+{
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+ int ret, msb, rdata;
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+
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+ for (msb = 0; msb < 2; msb++) {
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+ ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
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+ if (ret) {
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+ pwrap_leave_fsm_vldclr(wrp);
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+ return ret;
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+ }
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+
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+ pwrap_writel(wrp, (1 << 31) | (msb << 30) | (adr << 16) |
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+ ((wdata >> (msb * 16)) & 0xffff),
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+ PWRAP_WACS2_CMD);
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+
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+ /*
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+ * The pwrap_read operation is the requirement of hardware used
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+ * for the synchronization between two successive 16-bit
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+ * pwrap_writel operations composing one 32-bit bus writing.
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+ * Otherwise, we'll find the result fails on the lower 16-bit
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+ * pwrap writing.
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+ */
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+ if (!msb)
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+ pwrap_read(wrp, adr, &rdata);
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+ }
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+
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+ return 0;
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+}
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+
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+static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
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+{
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+ return wrp->slave->pwrap_write(wrp, adr, wdata);
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+}
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+
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static int pwrap_regmap_read(void *context, u32 adr, u32 *rdata)
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{
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return pwrap_read(context, adr, rdata);
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@@ -1082,18 +1117,21 @@ static const struct pwrap_slv_type pmic_mt6323 = {
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.dew_regs = mt6323_regs,
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.type = PMIC_MT6323,
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.pwrap_read = pwrap_read16,
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+ .pwrap_write = pwrap_write16,
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};
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static const struct pwrap_slv_type pmic_mt6380 = {
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.dew_regs = NULL,
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.type = PMIC_MT6380,
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.pwrap_read = pwrap_read32,
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+ .pwrap_write = pwrap_write32,
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};
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static const struct pwrap_slv_type pmic_mt6397 = {
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.dew_regs = mt6397_regs,
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.type = PMIC_MT6397,
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.pwrap_read = pwrap_read16,
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+ .pwrap_write = pwrap_write16,
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};
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static const struct of_device_id of_slave_match_tbl[] = {
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--
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2.11.0
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