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Now that 3.13 will be EOL soon, switch to 3.14. Known issues: * 74x164 is not available because upstream dropped non-DT support * jffs2 breaks with SMP Unknown issues: * probably plenty Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 40380
136 lines
4.5 KiB
Diff
136 lines
4.5 KiB
Diff
From 07d0224576cbb2e6ac680b4ade4bba7a49bd0a07 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Mon, 2 Dec 2013 12:34:11 +0100
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Subject: [PATCH 2/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from irq setup code
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/bcm63xx/irq.c | 109 ------------------------------------------------
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1 file changed, 109 deletions(-)
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--- a/arch/mips/bcm63xx/irq.c
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+++ b/arch/mips/bcm63xx/irq.c
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@@ -26,114 +26,6 @@ static void __internal_irq_mask_64(unsig
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static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
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static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
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-#ifndef BCMCPU_RUNTIME_DETECT
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-#ifdef CONFIG_BCM63XX_CPU_3368
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-#define irq_stat_reg PERF_IRQSTAT_3368_REG
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-#define irq_mask_reg PERF_IRQMASK_3368_REG
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-#define irq_bits 32
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-#define is_ext_irq_cascaded 0
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-#define ext_irq_start 0
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-#define ext_irq_end 0
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-#define ext_irq_count 4
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_3368
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-#define ext_irq_cfg_reg2 0
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-#endif
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-#ifdef CONFIG_BCM63XX_CPU_6328
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-#define irq_stat_reg PERF_IRQSTAT_6328_REG
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-#define irq_mask_reg PERF_IRQMASK_6328_REG
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-#define irq_bits 64
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-#define is_ext_irq_cascaded 1
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-#define ext_irq_start (BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE)
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-#define ext_irq_end (BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE)
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-#define ext_irq_count 4
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6328
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-#define ext_irq_cfg_reg2 0
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-#endif
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-#ifdef CONFIG_BCM63XX_CPU_6338
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-#define irq_stat_reg PERF_IRQSTAT_6338_REG
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-#define irq_mask_reg PERF_IRQMASK_6338_REG
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-#define irq_bits 32
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-#define is_ext_irq_cascaded 0
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-#define ext_irq_start 0
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-#define ext_irq_end 0
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-#define ext_irq_count 4
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6338
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-#define ext_irq_cfg_reg2 0
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-#endif
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-#ifdef CONFIG_BCM63XX_CPU_6345
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-#define irq_stat_reg PERF_IRQSTAT_6345_REG
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-#define irq_mask_reg PERF_IRQMASK_6345_REG
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-#define irq_bits 32
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-#define is_ext_irq_cascaded 0
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-#define ext_irq_start 0
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-#define ext_irq_end 0
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-#define ext_irq_count 4
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6345
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-#define ext_irq_cfg_reg2 0
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-#endif
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-#ifdef CONFIG_BCM63XX_CPU_6348
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-#define irq_stat_reg PERF_IRQSTAT_6348_REG
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-#define irq_mask_reg PERF_IRQMASK_6348_REG
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-#define irq_bits 32
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-#define is_ext_irq_cascaded 0
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-#define ext_irq_start 0
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-#define ext_irq_end 0
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-#define ext_irq_count 4
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6348
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-#define ext_irq_cfg_reg2 0
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-#endif
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-#ifdef CONFIG_BCM63XX_CPU_6358
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-#define irq_stat_reg PERF_IRQSTAT_6358_REG
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-#define irq_mask_reg PERF_IRQMASK_6358_REG
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-#define irq_bits 32
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-#define is_ext_irq_cascaded 1
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-#define ext_irq_start (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE)
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-#define ext_irq_end (BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE)
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-#define ext_irq_count 4
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6358
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-#define ext_irq_cfg_reg2 0
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-#endif
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-#ifdef CONFIG_BCM63XX_CPU_6362
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-#define irq_stat_reg PERF_IRQSTAT_6362_REG
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-#define irq_mask_reg PERF_IRQMASK_6362_REG
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-#define irq_bits 64
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-#define is_ext_irq_cascaded 1
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-#define ext_irq_start (BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE)
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-#define ext_irq_end (BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE)
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-#define ext_irq_count 4
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6362
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-#define ext_irq_cfg_reg2 0
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-#endif
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-#ifdef CONFIG_BCM63XX_CPU_6368
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-#define irq_stat_reg PERF_IRQSTAT_6368_REG
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-#define irq_mask_reg PERF_IRQMASK_6368_REG
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-#define irq_bits 64
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-#define is_ext_irq_cascaded 1
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-#define ext_irq_start (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE)
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-#define ext_irq_end (BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE)
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-#define ext_irq_count 6
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-#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6368
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-#define ext_irq_cfg_reg2 PERF_EXTIRQ_CFG_REG2_6368
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-#endif
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-
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-#if irq_bits == 32
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-#define dispatch_internal __dispatch_internal
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-#define internal_irq_mask __internal_irq_mask_32
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-#define internal_irq_unmask __internal_irq_unmask_32
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-#else
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-#define dispatch_internal __dispatch_internal_64
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-#define internal_irq_mask __internal_irq_mask_64
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-#define internal_irq_unmask __internal_irq_unmask_64
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-#endif
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-
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-#define irq_stat_addr (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg)
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-#define irq_mask_addr (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg)
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-
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-static inline void bcm63xx_init_irq(void)
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-{
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-}
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-#else /* ! BCMCPU_RUNTIME_DETECT */
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-
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static u32 irq_stat_addr, irq_mask_addr;
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static void (*dispatch_internal)(void);
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static int is_ext_irq_cascaded;
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@@ -234,7 +126,6 @@ static void bcm63xx_init_irq(void)
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internal_irq_unmask = __internal_irq_unmask_64;
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}
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}
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-#endif /* ! BCMCPU_RUNTIME_DETECT */
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static inline u32 get_ext_irq_perf_reg(int irq)
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{
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