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9131cb44ff
Introduce EN7581 SoC support with currently rfb board supported. This is a new 64bit SoC from Airoha that is currently almost fully supported upstream with only the DTS missing. Setting source-only waiting for the full upstream support to be completed. Link: https://github.com/openwrt/openwrt/pull/16730 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
436 lines
14 KiB
Diff
436 lines
14 KiB
Diff
From 7a4b3ebf1d60349587fee21872536e7bd6a4cf39 Mon Sep 17 00:00:00 2001
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Sun, 22 Sep 2024 19:38:30 +0200
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Subject: [PATCH] spi: airoha: do not keep {tx,rx} dma buffer always mapped
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DMA map txrx_buf on demand in airoha_snand_dirmap_read and
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airoha_snand_dirmap_write routines and do not keep it always mapped.
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This patch is not fixing any bug or introducing any functional change
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to the driver, it just simplifies the code and improve code readability
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without introducing any performance degradation according to the results
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obtained from the mtd_speedtest kernel module test.
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root@OpenWrt:# insmod mtd_test.ko
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root@OpenWrt:# insmod mtd_speedtest.ko dev=5
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[ 49.849869] =================================================
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[ 49.855659] mtd_speedtest: MTD device: 5
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[ 49.859583] mtd_speedtest: MTD device size 8388608, eraseblock size 131072, page size 2048, count of eraseblocks 64, pages per eraseblock 64, OOB size 128
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[ 49.874622] mtd_test: scanning for bad eraseblocks
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[ 49.879433] mtd_test: scanned 64 eraseblocks, 0 are bad
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[ 50.106372] mtd_speedtest: testing eraseblock write speed
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[ 53.083380] mtd_speedtest: eraseblock write speed is 2756 KiB/s
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[ 53.089322] mtd_speedtest: testing eraseblock read speed
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[ 54.143360] mtd_speedtest: eraseblock read speed is 7811 KiB/s
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[ 54.370365] mtd_speedtest: testing page write speed
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[ 57.349480] mtd_speedtest: page write speed is 2754 KiB/s
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[ 57.354895] mtd_speedtest: testing page read speed
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[ 58.410431] mtd_speedtest: page read speed is 7796 KiB/s
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[ 58.636805] mtd_speedtest: testing 2 page write speed
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[ 61.612427] mtd_speedtest: 2 page write speed is 2757 KiB/s
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[ 61.618021] mtd_speedtest: testing 2 page read speed
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[ 62.672653] mtd_speedtest: 2 page read speed is 7804 KiB/s
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[ 62.678159] mtd_speedtest: Testing erase speed
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[ 62.903617] mtd_speedtest: erase speed is 37063 KiB/s
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[ 62.908678] mtd_speedtest: Testing 2x multi-block erase speed
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[ 63.134083] mtd_speedtest: 2x multi-block erase speed is 37292 KiB/s
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[ 63.140442] mtd_speedtest: Testing 4x multi-block erase speed
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[ 63.364262] mtd_speedtest: 4x multi-block erase speed is 37566 KiB/s
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[ 63.370632] mtd_speedtest: Testing 8x multi-block erase speed
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[ 63.595740] mtd_speedtest: 8x multi-block erase speed is 37344 KiB/s
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[ 63.602089] mtd_speedtest: Testing 16x multi-block erase speed
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[ 63.827426] mtd_speedtest: 16x multi-block erase speed is 37320 KiB/s
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[ 63.833860] mtd_speedtest: Testing 32x multi-block erase speed
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[ 64.059389] mtd_speedtest: 32x multi-block erase speed is 37288 KiB/s
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[ 64.065833] mtd_speedtest: Testing 64x multi-block erase speed
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[ 64.290609] mtd_speedtest: 64x multi-block erase speed is 37415 KiB/s
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[ 64.297063] mtd_speedtest: finished
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[ 64.300555] =================================================
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Tested-by: Christian Marangi <ansuelsmth@gmail.com>
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Link: https://patch.msgid.link/20240922-airoha-spi-fixes-v3-1-f958802b3d68@kernel.org
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/spi-airoha-snfi.c | 154 ++++++++++++++++------------------
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1 file changed, 71 insertions(+), 83 deletions(-)
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--- a/drivers/spi/spi-airoha-snfi.c
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+++ b/drivers/spi/spi-airoha-snfi.c
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@@ -206,13 +206,6 @@ enum airoha_snand_cs {
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SPI_CHIP_SEL_LOW,
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};
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-struct airoha_snand_dev {
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- size_t buf_len;
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-
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- u8 *txrx_buf;
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- dma_addr_t dma_addr;
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-};
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-
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struct airoha_snand_ctrl {
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struct device *dev;
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struct regmap *regmap_ctrl;
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@@ -617,9 +610,9 @@ static bool airoha_snand_supports_op(str
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static int airoha_snand_dirmap_create(struct spi_mem_dirmap_desc *desc)
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{
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- struct airoha_snand_dev *as_dev = spi_get_ctldata(desc->mem->spi);
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+ u8 *txrx_buf = spi_get_ctldata(desc->mem->spi);
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- if (!as_dev->txrx_buf)
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+ if (!txrx_buf)
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return -EINVAL;
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if (desc->info.offset + desc->info.length > U32_MAX)
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@@ -634,10 +627,11 @@ static int airoha_snand_dirmap_create(st
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static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
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u64 offs, size_t len, void *buf)
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{
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- struct spi_device *spi = desc->mem->spi;
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- struct airoha_snand_dev *as_dev = spi_get_ctldata(spi);
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struct spi_mem_op *op = &desc->info.op_tmpl;
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+ struct spi_device *spi = desc->mem->spi;
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struct airoha_snand_ctrl *as_ctrl;
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+ u8 *txrx_buf = spi_get_ctldata(spi);
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+ dma_addr_t dma_addr;
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u32 val, rd_mode;
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int err;
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@@ -662,14 +656,17 @@ static ssize_t airoha_snand_dirmap_read(
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if (err)
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return err;
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- dma_sync_single_for_device(as_ctrl->dev, as_dev->dma_addr,
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- as_dev->buf_len, DMA_BIDIRECTIONAL);
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+ dma_addr = dma_map_single(as_ctrl->dev, txrx_buf, SPI_NAND_CACHE_SIZE,
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+ DMA_FROM_DEVICE);
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+ err = dma_mapping_error(as_ctrl->dev, dma_addr);
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+ if (err)
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+ return err;
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/* set dma addr */
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_STRADDR,
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- as_dev->dma_addr);
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+ dma_addr);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/* set cust sec size */
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val = as_ctrl->nfi_cfg.sec_size * as_ctrl->nfi_cfg.sec_num;
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@@ -678,58 +675,58 @@ static ssize_t airoha_snand_dirmap_read(
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REG_SPI_NFI_SNF_MISC_CTL2,
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SPI_NFI_READ_DATA_BYTE_NUM, val);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/* set read command */
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_RD_CTL2,
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op->cmd.opcode);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/* set read mode */
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL,
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FIELD_PREP(SPI_NFI_DATA_READ_WR_MODE, rd_mode));
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/* set read addr */
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_RD_CTL3, 0x0);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/* set nfi read */
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err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG,
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SPI_NFI_OPMODE,
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FIELD_PREP(SPI_NFI_OPMODE, 6));
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG,
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SPI_NFI_READ_MODE | SPI_NFI_DMA_MODE);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_CMD, 0x0);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/* trigger dma start read */
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err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
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SPI_NFI_RD_TRIG);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
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SPI_NFI_RD_TRIG);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_read_poll_timeout(as_ctrl->regmap_nfi,
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REG_SPI_NFI_SNF_STA_CTL1, val,
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(val & SPI_NFI_READ_FROM_CACHE_DONE),
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0, 1 * USEC_PER_SEC);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/*
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* SPI_NFI_READ_FROM_CACHE_DONE bit must be written at the end
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@@ -739,35 +736,41 @@ static ssize_t airoha_snand_dirmap_read(
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SPI_NFI_READ_FROM_CACHE_DONE,
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SPI_NFI_READ_FROM_CACHE_DONE);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_INTR,
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val, (val & SPI_NFI_AHB_DONE), 0,
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1 * USEC_PER_SEC);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/* DMA read need delay for data ready from controller to DRAM */
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udelay(1);
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- dma_sync_single_for_cpu(as_ctrl->dev, as_dev->dma_addr,
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- as_dev->buf_len, DMA_BIDIRECTIONAL);
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+ dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE,
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+ DMA_FROM_DEVICE);
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err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL);
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if (err < 0)
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return err;
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- memcpy(buf, as_dev->txrx_buf + offs, len);
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+ memcpy(buf, txrx_buf + offs, len);
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return len;
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+
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+error_dma_unmap:
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+ dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE,
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+ DMA_FROM_DEVICE);
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+ return err;
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}
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static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
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u64 offs, size_t len, const void *buf)
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{
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- struct spi_device *spi = desc->mem->spi;
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- struct airoha_snand_dev *as_dev = spi_get_ctldata(spi);
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struct spi_mem_op *op = &desc->info.op_tmpl;
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+ struct spi_device *spi = desc->mem->spi;
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+ u8 *txrx_buf = spi_get_ctldata(spi);
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struct airoha_snand_ctrl *as_ctrl;
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+ dma_addr_t dma_addr;
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u32 wr_mode, val;
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int err;
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@@ -776,19 +779,20 @@ static ssize_t airoha_snand_dirmap_write
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if (err < 0)
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return err;
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- dma_sync_single_for_cpu(as_ctrl->dev, as_dev->dma_addr,
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- as_dev->buf_len, DMA_BIDIRECTIONAL);
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- memcpy(as_dev->txrx_buf + offs, buf, len);
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- dma_sync_single_for_device(as_ctrl->dev, as_dev->dma_addr,
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- as_dev->buf_len, DMA_BIDIRECTIONAL);
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+ memcpy(txrx_buf + offs, buf, len);
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+ dma_addr = dma_map_single(as_ctrl->dev, txrx_buf, SPI_NAND_CACHE_SIZE,
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+ DMA_TO_DEVICE);
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+ err = dma_mapping_error(as_ctrl->dev, dma_addr);
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+ if (err)
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+ return err;
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err = airoha_snand_set_mode(as_ctrl, SPI_MODE_DMA);
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if (err < 0)
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- return err;
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+ goto error_dma_unmap;
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err = airoha_snand_nfi_config(as_ctrl);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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if (op->cmd.opcode == SPI_NAND_OP_PROGRAM_LOAD_QUAD ||
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op->cmd.opcode == SPI_NAND_OP_PROGRAM_LOAD_RAMDON_QUAD)
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@@ -797,9 +801,9 @@ static ssize_t airoha_snand_dirmap_write
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wr_mode = 0;
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_STRADDR,
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- as_dev->dma_addr);
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+ dma_addr);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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val = FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM,
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as_ctrl->nfi_cfg.sec_size * as_ctrl->nfi_cfg.sec_num);
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@@ -807,65 +811,65 @@ static ssize_t airoha_snand_dirmap_write
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REG_SPI_NFI_SNF_MISC_CTL2,
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SPI_NFI_PROG_LOAD_BYTE_NUM, val);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_PG_CTL1,
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FIELD_PREP(SPI_NFI_PG_LOAD_CMD,
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op->cmd.opcode));
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL,
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FIELD_PREP(SPI_NFI_DATA_READ_WR_MODE, wr_mode));
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_PG_CTL2, 0x0);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG,
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SPI_NFI_READ_MODE);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG,
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SPI_NFI_OPMODE,
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FIELD_PREP(SPI_NFI_OPMODE, 3));
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG,
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SPI_NFI_DMA_MODE);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_CMD, 0x80);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
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SPI_NFI_WR_TRIG);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
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SPI_NFI_WR_TRIG);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_INTR,
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val, (val & SPI_NFI_AHB_DONE), 0,
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1 * USEC_PER_SEC);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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err = regmap_read_poll_timeout(as_ctrl->regmap_nfi,
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REG_SPI_NFI_SNF_STA_CTL1, val,
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(val & SPI_NFI_LOAD_TO_CACHE_DONE),
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0, 1 * USEC_PER_SEC);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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/*
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* SPI_NFI_LOAD_TO_CACHE_DONE bit must be written at the end
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@@ -875,13 +879,20 @@ static ssize_t airoha_snand_dirmap_write
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SPI_NFI_LOAD_TO_CACHE_DONE,
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SPI_NFI_LOAD_TO_CACHE_DONE);
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if (err)
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- return err;
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+ goto error_dma_unmap;
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+ dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE,
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+ DMA_TO_DEVICE);
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err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL);
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if (err < 0)
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return err;
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return len;
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+
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+error_dma_unmap:
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+ dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE,
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+ DMA_TO_DEVICE);
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+ return err;
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}
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static int airoha_snand_exec_op(struct spi_mem *mem,
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@@ -956,42 +967,20 @@ static const struct spi_controller_mem_o
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static int airoha_snand_setup(struct spi_device *spi)
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{
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struct airoha_snand_ctrl *as_ctrl;
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- struct airoha_snand_dev *as_dev;
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-
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- as_ctrl = spi_controller_get_devdata(spi->controller);
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-
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- as_dev = devm_kzalloc(as_ctrl->dev, sizeof(*as_dev), GFP_KERNEL);
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- if (!as_dev)
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- return -ENOMEM;
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+ u8 *txrx_buf;
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/* prepare device buffer */
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- as_dev->buf_len = SPI_NAND_CACHE_SIZE;
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- as_dev->txrx_buf = devm_kzalloc(as_ctrl->dev, as_dev->buf_len,
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- GFP_KERNEL);
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- if (!as_dev->txrx_buf)
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- return -ENOMEM;
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-
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- as_dev->dma_addr = dma_map_single(as_ctrl->dev, as_dev->txrx_buf,
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- as_dev->buf_len, DMA_BIDIRECTIONAL);
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- if (dma_mapping_error(as_ctrl->dev, as_dev->dma_addr))
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+ as_ctrl = spi_controller_get_devdata(spi->controller);
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+ txrx_buf = devm_kzalloc(as_ctrl->dev, SPI_NAND_CACHE_SIZE,
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+ GFP_KERNEL);
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+ if (!txrx_buf)
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return -ENOMEM;
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- spi_set_ctldata(spi, as_dev);
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+ spi_set_ctldata(spi, txrx_buf);
|
|
|
|
return 0;
|
|
}
|
|
|
|
-static void airoha_snand_cleanup(struct spi_device *spi)
|
|
-{
|
|
- struct airoha_snand_dev *as_dev = spi_get_ctldata(spi);
|
|
- struct airoha_snand_ctrl *as_ctrl;
|
|
-
|
|
- as_ctrl = spi_controller_get_devdata(spi->controller);
|
|
- dma_unmap_single(as_ctrl->dev, as_dev->dma_addr,
|
|
- as_dev->buf_len, DMA_BIDIRECTIONAL);
|
|
- spi_set_ctldata(spi, NULL);
|
|
-}
|
|
-
|
|
static int airoha_snand_nfi_setup(struct airoha_snand_ctrl *as_ctrl)
|
|
{
|
|
u32 val, sec_size, sec_num;
|
|
@@ -1093,7 +1082,6 @@ static int airoha_snand_probe(struct pla
|
|
ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
|
|
ctrl->mode_bits = SPI_RX_DUAL;
|
|
ctrl->setup = airoha_snand_setup;
|
|
- ctrl->cleanup = airoha_snand_cleanup;
|
|
device_set_node(&ctrl->dev, dev_fwnode(dev));
|
|
|
|
err = airoha_snand_nfi_setup(as_ctrl);
|