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c8967d6d12
Some devices initialize AES during boot and AES works out of the box and the correct endianess is set. NDC means (No Danube Compatibility Mode) and the endianess setting has no effect if its set to 0. NDC 0: OFF ENDI bit cannot be written as in Danube To make it work for other devices, the NDC control register needs to be set to 1. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
145 lines
3.5 KiB
C
145 lines
3.5 KiB
C
/******************************************************************************
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**
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** FILE NAME : ifxmips_deu_vr9.c
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** PROJECT : IFX UEIP
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** MODULES : DEU Module for VR9
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**
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** DATE : September 8, 2009
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** AUTHOR : Mohammad Firdaus
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** DESCRIPTION : Data Encryption Unit Driver
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** COPYRIGHT : Copyright (c) 2009
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** Infineon Technologies AG
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** Am Campeon 1-12, 85579 Neubiberg, Germany
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**
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** This program is free software; you can redistribute it and/or modify
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** it under the terms of the GNU General Public License as published by
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** the Free Software Foundation; either version 2 of the License, or
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** (at your option) any later version.
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**
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** HISTORY
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** $Date $Author $Comment
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** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
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*******************************************************************************/
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/*!
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\defgroup IFX_DEU IFX_DEU_DRIVERS
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\ingroup API
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\brief deu driver module
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*/
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/*!
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\file ifxmips_deu_vr9.c
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\ingroup IFX_DEU
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\brief board specific deu driver file for vr9
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*/
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/*!
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\defgroup BOARD_SPECIFIC_FUNCTIONS IFX_BOARD_SPECIFIC_FUNCTIONS
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\ingroup IFX_DEU
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\brief board specific deu driver functions
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*/
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/* Project header files */
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <asm/io.h> //dma_cache_inv
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#include "ifxmips_deu_dma.h"
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#include "ifxmips_deu_vr9.h"
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/* Function decleration */
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void aes_chip_init (void);
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void des_chip_init (void);
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int deu_dma_init (void);
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void deu_dma_priv_init(void);
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u32 endian_swap(u32 input);
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u32* memory_alignment(const u8 *arg, u32 *buff_alloc, int in_out, int nbytes);
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void aes_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
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void des_dma_memory_copy(u32 *outcopy, u32 *out_dma, u8 *out_arg, int nbytes);
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void __exit ifxdeu_fini_dma(void);
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#define DES_3DES_START IFX_DES_CON
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#define AES_START IFX_AES_CON
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/* Variables */
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u8 *g_dma_page_ptr = NULL;
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u8 *g_dma_block = NULL;
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u8 *g_dma_block2 = NULL;
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deu_drv_priv_t deu_dma_priv;
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/*! \fn u32 endian_swap(u32 input)
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* \ingroup BOARD_SPECIFIC_FUNCTIONS
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* \brief Swap data given to the function
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* \param input Data input to be swapped
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* \return either the swapped data or the input data depending on whether it is in DMA mode or FPI mode
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*/
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u32 endian_swap(u32 input)
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{
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return input;
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}
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/*! \fn u32 input_swap(u32 input)
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* \ingroup BOARD_SPECIFIC_FUNCTIONS
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* \brief Not used
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* \return input
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*/
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u32 input_swap(u32 input)
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{
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return input;
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}
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/*! \fn void aes_chip_init (void)
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* \ingroup BOARD_SPECIFIC_FUNCTIONS
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* \brief initialize AES hardware
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*/
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void aes_chip_init (void)
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{
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volatile struct aes_t *aes = (struct aes_t *) AES_START;
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// start crypto engine with write to ILR
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aes->controlr.SM = 1;
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aes->controlr.NDC = 1;
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asm("sync");
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aes->controlr.ENDI = 1;
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asm("sync");
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aes->controlr.ARS = 0;
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}
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/*! \fn void des_chip_init (void)
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* \ingroup IFX_AES_FUNCTIONS
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* \brief initialize DES hardware
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*/
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void des_chip_init (void)
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{
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volatile struct des_t *des = (struct des_t *) DES_3DES_START;
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// start crypto engine with write to ILR
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des->controlr.SM = 1;
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des->controlr.NDC = 1;
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asm("sync");
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des->controlr.ENDI = 1;
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asm("sync");
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des->controlr.ARS = 0;
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}
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/*! \fn void chip_version(void)
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* \ingroup IFX_DES_FUNCTIONS
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* \brief function not used in VR9
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*/
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void chip_version(void)
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{
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return;
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}
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