mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
d70ec3008d
Specify firmware partition format by compatible string. formats in ramips: - denx,uimage - tplink,firmware - seama It's unlikely but the firmware splitting might not work any longer for the following boards, due to a custom header: - EX2700: two uImage headers - BR-6478AC-V2: edimax-header - 3G-6200N: edimax-header - 3G-6200NL: edimax-header - BR-6475ND: edimax-header - TEW-638APB-V2: umedia-header - RT-N56U: mkrtn56uimg But it rather looks like the uImage splitter is fine with the extra header. The following dts are not touched, due to lack of a compatible string in the matching firmware splitter submodule: - CONFIG_MTD_SPLIT_JIMAGE_FW DWR-116-A1.dts DWR-118-A2.dts DWR-512-B.dts DWR-921-C1.dts LR-25G001.dts - CONFIG_MTD_SPLIT_TRX_FW WCR-1166DS.dts WSR-1166.dts - CONFIG_MTD_SPLIT_MINOR_FW RBM11G.dts RBM33G.dts - CONFIG_MTD_SPLIT_LZMA_FW AR670W.dts - CONFIG_MTD_SPLIT_WRGG_FW DAP-1522-A1.dts Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
94 lines
1.4 KiB
Plaintext
94 lines
1.4 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "rt3050.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
compatible = "planex,mzk-wdpr", "ralink,rt3052-soc";
|
|
model = "Planex MZK-WDPR";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200";
|
|
};
|
|
|
|
cfi@1f000000 {
|
|
compatible = "cfi-flash";
|
|
reg = <0x1f000000 0x800000>;
|
|
|
|
bank-width = <2>;
|
|
device-width = <2>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@7f0000 {
|
|
label = "Data3G";
|
|
reg = <0x7f0000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0x680000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
gpio-export {
|
|
compatible = "gpio-export";
|
|
|
|
lcd_ctrl1 {
|
|
gpio-export,name = "lcd_ctrl1";
|
|
gpio-export,output = <0>;
|
|
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
gpio {
|
|
ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
mtd-mac-address = <&factory 0x28>;
|
|
};
|
|
|
|
&esw {
|
|
mediatek,portmap = <0x2f>;
|
|
};
|
|
|
|
&wmac {
|
|
ralink,mtd-eeprom = <&factory 0>;
|
|
};
|
|
|
|
&otg {
|
|
status = "okay";
|
|
};
|