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1e6f330ccf
Define nvmem-cells and convert mtd-mac-address to nvmem implementation. The conversion is done with an automated script. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
351 lines
5.7 KiB
Plaintext
351 lines
5.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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/ {
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model = "Buffalo WSR-2533DHP2";
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compatible = "buffalo,wsr-2533dhp2", "mediatek,mt7622";
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aliases {
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serial0 = &uart0;
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led-boot = &power_green;
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led-failsafe = &power_amber;
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led-running = &power_green;
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led-upgrade = &power_green;
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};
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
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};
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memory {
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reg = <0 0x40000000 0 0x0F000000>;
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};
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leds {
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compatible = "gpio-leds";
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wireless_amber {
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label = "amber:wireless";
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gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
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};
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power_amber: power_amber {
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label = "amber:power";
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gpios = <&pio 3 GPIO_ACTIVE_LOW>;
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};
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power_green: power_green {
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label = "green:power";
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gpios = <&pio 4 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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wireless_green {
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label = "green:wireless";
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gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
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};
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internet {
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label = "green:internet";
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gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
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};
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router {
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label = "green:router";
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gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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/* GPIO 1 and 16 are a tri-state switch button with
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* ROUTER / AP / WB.
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*/
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router {
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label = "router";
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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bridge {
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label = "wb";
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gpios = <&pio 16 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_1>;
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linux,input-type = <EV_SW>;
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};
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/* GPIO 18 is a switch button with AUTO / MANUAL. */
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manual {
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label = "manual";
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gpios = <&pio 18 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_2>;
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linux,input-type = <EV_SW>;
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};
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wps {
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label = "wps";
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gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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rtkgsw: rtkgsw@0 {
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compatible = "mediatek,rtk-gsw";
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mediatek,ethsys = <ðsys>;
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mediatek,mdio = <&mdio>;
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mediatek,reset-pin = <&pio 54 GPIO_ACTIVE_HIGH>;
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};
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};
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&cpu0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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&cpu1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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status = "okay";
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};
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&slot0 {
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status = "okay";
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x5000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&pio {
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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/* Parallel nand is shared pin with eMMC */
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parallel_nand_pins: parallel-nand-pins {
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mux {
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function = "flash";
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groups = "par_nand";
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};
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conf-cmd-dat {
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pins = "NCEB", "NWEB", "NREB",
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"NDL4", "NDL5", "NDL6",
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"NDL7", "NRB", "NCLE",
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"NALE", "NDL0", "NDL1",
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"NDL2", "NDL3";
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input-enable;
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_1_waken",
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"pcie0_1_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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pwm7_pins: pwm1-2-pins {
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mux {
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function = "pwm";
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groups = "pwm_ch7_2";
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};
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx" ;
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};
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};
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watchdog_pins: watchdog-pins {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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};
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&bch {
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status = "okay";
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};
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ð {
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pinctrl-names = "default";
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pinctrl-0 = <ð_pins>;
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-connection-type = "2500base-x";
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(-1)>;
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&nandc {
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pinctrl-names = "default";
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pinctrl-0 = <¶llel_nand_pins>;
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status = "okay";
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nand@0 {
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reg = <0>;
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nand-ecc-mode = "hw";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Preloader";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "ATF";
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reg = <0x80000 0x40000>;
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read-only;
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};
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partition@c0000 {
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label = "Bootloader";
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reg = <0xc0000 0x80000>;
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read-only;
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};
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partition@140000 {
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label = "Config";
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reg = <0x140000 0x80000>;
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};
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factory: partition@1c0000 {
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label = "factory";
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reg = <0x1c0000 0x40000>;
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read-only;
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};
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partition@200000 {
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compatible = "brcm,trx";
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brcm,trx-magic = <0x32504844>;
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label = "firmware";
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reg = <0x200000 0x3a00000>;
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};
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partition@3C00000 {
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label = "Kernel2";
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reg = <0x3c00000 0x3a00000>;
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};
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partition@7600000 {
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label = "glbcfg";
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reg = <0x7600000 0x200000>;
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read-only;
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};
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partition@7800000 {
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label = "board_data";
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reg = <0x7800000 0x200000>;
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read-only;
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};
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};
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};
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm7_pins>;
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status = "okay";
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};
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&pwrap {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_bus_pins>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&watchdog {
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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status = "okay";
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};
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&wmac {
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status = "okay";
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mediatek,mtd-eeprom = <&factory 0x0>;
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};
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&rtc {
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status = "disabled";
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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