mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 06:08:08 +00:00
8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
7687 lines
205 KiB
Diff
7687 lines
205 KiB
Diff
From fefbbcb3324d044d0f8606b8c726587d2a146dde Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Thu, 5 Oct 2023 10:06:18 +0100
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Subject: [PATCH 0658/1085] dts: 2712: Update for device tree
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dtoverlays: Fix up edt5406 entries to match with vc4-kms-dsi-7inch
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vc4-kms-dsi-7inch expects the touch fragment to be named ts_i2c_frag,
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but edt5406 didn't do this.
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dt: Add DSI1 and DSI2 aliases to 2712
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In order to keep the DRM names consistent as DSI-1 and DSI-2, add
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aliases to the Pi5 DT.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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.../boot/dts/broadcom/bcm2708-rpi-b-plus.dts | 3 +
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.../boot/dts/broadcom/bcm2708-rpi-b-rev1.dts | 3 +
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arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts | 3 +
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arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts | 3 +
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.../boot/dts/broadcom/bcm2708-rpi-zero-w.dts | 1 +
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.../boot/dts/broadcom/bcm2708-rpi-zero.dts | 1 +
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.../arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts | 3 +
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.../arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts | 3 +
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arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi | 3 +
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.../arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts | 3 +
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.../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 3 +
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.../arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts | 3 +
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.../arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts | 3 +
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.../dts/broadcom/bcm2710-rpi-zero-2-w.dts | 3 +
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.../arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts | 3 +
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.../arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts | 3 +
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.../boot/dts/broadcom/bcm2711-rpi-cm4s.dts | 3 +
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.../arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 826 +++++++++++
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arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi | 281 ++++
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arch/arm/boot/dts/broadcom/bcm2712.dtsi | 1286 +++++++++++++++++
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arch/arm/boot/dts/broadcom/rp1.dtsi | 1168 +++++++++++++++
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arch/arm/boot/dts/overlays/Makefile | 23 +
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arch/arm/boot/dts/overlays/README | 360 ++++-
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.../dts/overlays/adau1977-adc-overlay.dts | 4 +-
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.../dts/overlays/adau7002-simple-overlay.dts | 4 +-
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.../overlays/akkordion-iqdacplus-overlay.dts | 4 +-
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.../allo-boss-dac-pcm512x-audio-overlay.dts | 10 +-
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.../overlays/allo-boss2-dac-audio-overlay.dts | 2 +-
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.../dts/overlays/allo-digione-overlay.dts | 4 +-
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.../allo-katana-dac-audio-overlay.dts | 2 +-
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.../allo-piano-dac-pcm512x-audio-overlay.dts | 4 +-
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...o-piano-dac-plus-pcm512x-audio-overlay.dts | 4 +-
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.../boot/dts/overlays/applepi-dac-overlay.dts | 4 +-
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.../dts/overlays/arducam-64mp-overlay.dts | 2 +-
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.../overlays/arducam-pivariety-overlay.dts | 2 +-
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.../overlays/audioinjector-addons-overlay.dts | 4 +-
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.../audioinjector-bare-i2s-overlay.dts | 6 +-
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...dioinjector-isolated-soundcard-overlay.dts | 4 +-
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.../overlays/audioinjector-ultra-overlay.dts | 6 +-
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.../audioinjector-wm8731-audio-overlay.dts | 4 +-
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.../dts/overlays/audiosense-pi-overlay.dts | 4 +-
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.../boot/dts/overlays/chipdip-dac-overlay.dts | 4 +-
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.../dts/overlays/cirrus-wm5102-overlay.dts | 4 +-
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.../boot/dts/overlays/dacberry400-overlay.dts | 4 +-
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.../dts/overlays/dionaudio-kiwi-overlay.dts | 4 +-
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.../dts/overlays/dionaudio-loco-overlay.dts | 4 +-
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.../overlays/dionaudio-loco-v2-overlay.dts | 4 +-
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.../dts/overlays/disable-bt-pi5-overlay.dts | 17 +
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.../dts/overlays/disable-wifi-pi5-overlay.dts | 13 +
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arch/arm/boot/dts/overlays/draws-overlay.dts | 6 +-
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.../boot/dts/overlays/edt-ft5406-overlay.dts | 22 +-
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arch/arm/boot/dts/overlays/edt-ft5406.dtsi | 13 +-
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.../boot/dts/overlays/fe-pi-audio-overlay.dts | 4 +-
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.../boot/dts/overlays/ghost-amp-overlay.dts | 4 +-
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.../googlevoicehat-soundcard-overlay.dts | 4 +-
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.../dts/overlays/hifiberry-amp-overlay.dts | 4 +-
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.../dts/overlays/hifiberry-amp100-overlay.dts | 11 +-
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.../dts/overlays/hifiberry-amp3-overlay.dts | 4 +-
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.../dts/overlays/hifiberry-dac-overlay.dts | 4 +-
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.../overlays/hifiberry-dacplus-overlay.dts | 11 +-
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.../overlays/hifiberry-dacplusadc-overlay.dts | 10 +-
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.../hifiberry-dacplusadcpro-overlay.dts | 10 +-
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.../overlays/hifiberry-dacplusdsp-overlay.dts | 4 +-
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.../overlays/hifiberry-dacplushd-overlay.dts | 4 +-
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.../dts/overlays/hifiberry-digi-overlay.dts | 4 +-
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.../overlays/hifiberry-digi-pro-overlay.dts | 4 +-
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.../boot/dts/overlays/i-sabre-q2m-overlay.dts | 4 +-
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.../boot/dts/overlays/i2c0-pi5-overlay.dts | 34 +
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.../boot/dts/overlays/i2c1-pi5-overlay.dts | 34 +
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.../boot/dts/overlays/i2c2-pi5-overlay.dts | 21 +
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.../boot/dts/overlays/i2c3-pi5-overlay.dts | 22 +
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.../arm/boot/dts/overlays/i2s-dac-overlay.dts | 4 +-
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arch/arm/boot/dts/overlays/imx219-overlay.dts | 2 +-
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arch/arm/boot/dts/overlays/imx258-overlay.dts | 2 +-
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.../boot/dts/overlays/imx290_327-overlay.dtsi | 2 +-
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arch/arm/boot/dts/overlays/imx296-overlay.dts | 2 +-
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.../boot/dts/overlays/imx477_378-overlay.dtsi | 2 +-
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arch/arm/boot/dts/overlays/imx519-overlay.dts | 2 +-
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arch/arm/boot/dts/overlays/imx708-overlay.dts | 4 +-
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.../dts/overlays/iqaudio-codec-overlay.dts | 4 +-
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.../boot/dts/overlays/iqaudio-dac-overlay.dts | 4 +-
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.../dts/overlays/iqaudio-dacplus-overlay.dts | 4 +-
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.../iqaudio-digi-wm8804-audio-overlay.dts | 4 +-
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.../arm/boot/dts/overlays/irs1125-overlay.dts | 2 +-
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.../dts/overlays/justboom-both-overlay.dts | 4 +-
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.../dts/overlays/justboom-dac-overlay.dts | 4 +-
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.../dts/overlays/justboom-digi-overlay.dts | 4 +-
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.../boot/dts/overlays/max98357a-overlay.dts | 6 +-
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.../boot/dts/overlays/mbed-dac-overlay.dts | 6 +-
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.../boot/dts/overlays/merus-amp-overlay.dts | 4 +-
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.../dts/overlays/midi-uart0-pi5-overlay.dts | 35 +
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.../dts/overlays/midi-uart1-pi5-overlay.dts | 35 +
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.../dts/overlays/midi-uart2-pi5-overlay.dts | 35 +
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.../dts/overlays/midi-uart3-pi5-overlay.dts | 35 +
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.../dts/overlays/midi-uart4-pi5-overlay.dts | 35 +
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arch/arm/boot/dts/overlays/ov2311-overlay.dts | 2 +-
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arch/arm/boot/dts/overlays/ov5647-overlay.dts | 2 +-
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arch/arm/boot/dts/overlays/ov7251-overlay.dts | 2 +-
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arch/arm/boot/dts/overlays/ov9281-overlay.dts | 2 +-
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arch/arm/boot/dts/overlays/overlay_map.dts | 226 +++
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arch/arm/boot/dts/overlays/pibell-overlay.dts | 6 +-
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.../arm/boot/dts/overlays/pifi-40-overlay.dts | 4 +-
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.../boot/dts/overlays/pifi-dac-hd-overlay.dts | 4 +-
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.../dts/overlays/pifi-dac-zero-overlay.dts | 4 +-
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.../dts/overlays/pifi-mini-210-overlay.dts | 4 +-
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.../arm/boot/dts/overlays/pisound-overlay.dts | 4 +-
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.../boot/dts/overlays/proto-codec-overlay.dts | 4 +-
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.../rra-digidac1-wm8741-audio-overlay.dts | 4 +-
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.../dts/overlays/spi2-1cs-pi5-overlay.dts | 33 +
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.../dts/overlays/spi2-2cs-pi5-overlay.dts | 44 +
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.../dts/overlays/spi3-1cs-pi5-overlay.dts | 33 +
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.../dts/overlays/spi3-2cs-pi5-overlay.dts | 44 +
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.../dts/overlays/spi5-1cs-pi5-overlay.dts | 33 +
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.../dts/overlays/spi5-2cs-pi5-overlay.dts | 44 +
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.../dts/overlays/superaudioboard-overlay.dts | 6 +-
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.../dts/overlays/tc358743-audio-overlay.dts | 10 +-
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.../boot/dts/overlays/tc358743-overlay.dts | 2 +-
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.../boot/dts/overlays/uart0-pi5-overlay.dts | 17 +
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.../boot/dts/overlays/uart1-pi5-overlay.dts | 17 +
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.../boot/dts/overlays/uart2-pi5-overlay.dts | 17 +
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.../boot/dts/overlays/uart3-pi5-overlay.dts | 17 +
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.../boot/dts/overlays/uart4-pi5-overlay.dts | 17 +
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arch/arm/boot/dts/overlays/udrc-overlay.dts | 6 +-
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.../dts/overlays/ugreen-dabboard-overlay.dts | 10 +-
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.../dts/overlays/vc4-fkms-v3d-overlay.dts | 6 +
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.../dts/overlays/vc4-fkms-v3d-pi4-overlay.dts | 6 +
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.../overlays/vc4-kms-dsi-7inch-overlay.dts | 20 +-
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.../vc4-kms-dsi-waveshare-panel-overlay.dts | 8 +-
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.../dts/overlays/vc4-kms-v3d-pi5-overlay.dts | 147 ++
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.../dts/overlays/vc4-kms-vga666-overlay.dts | 9 +-
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.../dts/overlays/wm8960-soundcard-overlay.dts | 4 +-
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arch/arm64/boot/dts/broadcom/Makefile | 1 +
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.../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 2 +
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133 files changed, 5147 insertions(+), 272 deletions(-)
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create mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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create mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi
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create mode 100644 arch/arm/boot/dts/broadcom/bcm2712.dtsi
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create mode 100644 arch/arm/boot/dts/broadcom/rp1.dtsi
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create mode 100644 arch/arm/boot/dts/overlays/disable-bt-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/i2c0-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/i2c1-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/i2c2-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/i2c3-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart2-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart3-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart4-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-pi5-overlay.dts
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create mode 100755 arch/arm/boot/dts/overlays/uart0-pi5-overlay.dts
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create mode 100755 arch/arm/boot/dts/overlays/uart1-pi5-overlay.dts
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create mode 100755 arch/arm/boot/dts/overlays/uart2-pi5-overlay.dts
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create mode 100755 arch/arm/boot/dts/overlays/uart3-pi5-overlay.dts
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create mode 100755 arch/arm/boot/dts/overlays/uart4-pi5-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-pi5-overlay.dts
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create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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--- a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-plus.dts
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@@ -193,6 +193,9 @@ i2c_arm: &i2c1 {
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i2c_vc: &i2c0 {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b-rev1.dts
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@@ -202,6 +202,9 @@ i2c_arm: &i2c0 {
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i2c_vc: &i2c1 {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-b.dts
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@@ -184,6 +184,9 @@ i2c_arm: &i2c1 {
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i2c_vc: &i2c0 {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-cm.dts
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@@ -19,6 +19,9 @@ cam0_reg: &cam0_regulator {
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gpio = <&gpio 31 GPIO_ACTIVE_HIGH>;
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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&uart0 {
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status = "okay";
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};
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--- a/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero-w.dts
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@@ -242,6 +242,7 @@ cam0_reg: &cam_dummy_reg {
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i2c_arm: &i2c1 {};
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i2c_vc: &i2c0 {};
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+i2c_csi_dsi0: &i2c0 {};
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/ {
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__overrides__ {
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--- a/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2708-rpi-zero.dts
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@@ -177,6 +177,7 @@ cam0_reg: &cam_dummy_reg {
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i2c_arm: &i2c1 {};
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i2c_vc: &i2c0 {};
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+i2c_csi_dsi0: &i2c0 {};
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/ {
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__overrides__ {
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--- a/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi-2-b.dts
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@@ -187,6 +187,9 @@
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cam0_reg: &cam_dummy_reg {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2709-rpi-cm2.dts
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@@ -21,6 +21,9 @@ cam0_reg: &cam0_regulator {
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gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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&uart0 {
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status = "okay";
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};
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--- a/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi
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+++ b/arch/arm/boot/dts/broadcom/bcm270x-rpi.dtsi
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@@ -123,6 +123,9 @@
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status = "disabled";
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};
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+i2s_clk_producer: &i2s {};
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+i2s_clk_consumer: &i2s {};
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+
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&clocks {
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firmware = <&firmware>;
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};
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--- a/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-2-b.dts
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@@ -187,6 +187,9 @@
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cam0_reg: &cam_dummy_reg {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
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@@ -275,6 +275,9 @@
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cam0_reg: &cam_dummy_reg {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-3-b.dts
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@@ -284,6 +284,9 @@
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cam0_reg: &cam_dummy_reg {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-cm3.dts
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@@ -21,6 +21,9 @@ cam0_reg: &cam0_regulator {
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gpio = <&gpio 31 GPIO_ACTIVE_HIGH>;
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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&uart0 {
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status = "okay";
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};
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--- a/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2710-rpi-zero-2-w.dts
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@@ -261,6 +261,9 @@
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cam0_reg: &cam_dummy_reg {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts
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@@ -396,6 +396,9 @@
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cam0_reg: &cam_dummy_reg {
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_headphones=1 snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_headphones=0 snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts
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@@ -405,6 +405,9 @@ cam0_reg: &cam1_reg {
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gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
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--- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts
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+++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4s.dts
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@@ -279,6 +279,9 @@ cam0_reg: &cam0_regulator {
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status = "disabled";
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};
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+i2c_csi_dsi0: &i2c0 {
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+};
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+
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/ {
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__overrides__ {
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audio = <&chosen>,"bootargs{on='snd_bcm2835.enable_hdmi=1',off='snd_bcm2835.enable_hdmi=0'}";
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--- /dev/null
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+++ b/arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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@@ -0,0 +1,826 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/clock/rp1.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/mfd/rp1.h>
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+#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
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+
|
|
+#define i2c0 _i2c0
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|
+#define i2c3 _i2c3
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|
+#define i2c4 _i2c4
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|
+#define i2c5 _i2c5
|
|
+#define i2c6 _i2c6
|
|
+#define i2c8 _i2c8
|
|
+#define i2s _i2s
|
|
+#define pwm0 _pwm0
|
|
+#define pwm1 _pwm1
|
|
+#define spi0 _spi0
|
|
+#define spi3 _spi3
|
|
+#define spi4 _spi4
|
|
+#define spi5 _spi5
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|
+#define spi6 _spi6
|
|
+#define uart0 _uart0
|
|
+#define uart2 _uart2
|
|
+#define uart3 _uart3
|
|
+#define uart4 _uart4
|
|
+#define uart5 _uart5
|
|
+
|
|
+#include "bcm2712.dtsi"
|
|
+
|
|
+#undef i2c0
|
|
+#undef i2c3
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|
+#undef i2c4
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|
+#undef i2c5
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|
+#undef i2c6
|
|
+#undef i2c8
|
|
+#undef i2s
|
|
+#undef pwm0
|
|
+#undef pwm1
|
|
+#undef spi0
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|
+#undef spi3
|
|
+#undef spi4
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|
+#undef spi5
|
|
+#undef spi6
|
|
+#undef uart0
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|
+#undef uart2
|
|
+#undef uart3
|
|
+#undef uart4
|
|
+#undef uart5
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|
+
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|
+/ {
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|
+ compatible = "raspberrypi,5-model-b", "brcm,bcm2712";
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|
+ model = "Raspberry Pi 5 Model B";
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|
+
|
|
+ /* Will be filled by the bootloader */
|
|
+ memory@0 {
|
|
+ device_type = "memory";
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|
+ reg = <0 0 0x28000000>;
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|
+ };
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|
+
|
|
+ leds: leds {
|
|
+ compatible = "gpio-leds";
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|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "PWR";
|
|
+ gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "off";
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+
|
|
+ act_led: led-act {
|
|
+ label = "ACT";
|
|
+ gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "off";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sd_io_1v8_reg: sd_io_1v8_reg {
|
|
+ compatible = "regulator-gpio";
|
|
+ regulator-name = "vdd-sd-io";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ regulator-always-on;
|
|
+ regulator-settling-time-us = <5000>;
|
|
+ gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>;
|
|
+ states = <1800000 0x1
|
|
+ 3300000 0x0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ sd_vcc_reg: sd_vcc_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc-sd";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ enable-active-high;
|
|
+ gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ wl_on_reg: wl_on_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "wl-on-regulator";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ pinctrl-0 = <&wl_on_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ gpio = <&gio 28 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ startup-delay-us = <150000>;
|
|
+ enable-active-high;
|
|
+ };
|
|
+
|
|
+ clocks: clocks {
|
|
+ };
|
|
+
|
|
+ cam1_clk: cam1_clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ cam0_clk: cam0_clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ cam0_reg: cam0_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam0_reg";
|
|
+ enable-active-high;
|
|
+ status = "okay";
|
|
+ gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to MIPI 0 connector
|
|
+ };
|
|
+
|
|
+ cam1_reg: cam1_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam1_reg";
|
|
+ enable-active-high;
|
|
+ status = "okay";
|
|
+ gpio = <&rp1_gpio 46 0>; // CD1_IO0_MICCLK, to MIPI 1 connector
|
|
+ };
|
|
+
|
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+ cam_dummy_reg: cam_dummy_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam-dummy-reg";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ dummy: dummy {
|
|
+ // A target for unwanted overlay fragments
|
|
+ };
|
|
+};
|
|
+
|
|
+rp1_target: &pcie2 {
|
|
+ brcm,vdm-qos-map = <0xbbaa9888>;
|
|
+ aspm-no-l0s;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+// Add some labels to 2712 device
|
|
+
|
|
+// The system UART
|
|
+uart10: &_uart0 { status = "okay"; };
|
|
+
|
|
+// The system SPI for the bootloader EEPROM
|
|
+spi10: &_spi0 { status = "okay"; };
|
|
+
|
|
+i2c_rp1boot: &_i2c3 { };
|
|
+
|
|
+#include "rp1.dtsi"
|
|
+
|
|
+&rp1 {
|
|
+ // PCIe address space layout:
|
|
+ // 00_00000000-00_00xxxxxx = RP1 peripherals
|
|
+ // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM
|
|
+
|
|
+ // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx
|
|
+ // This is the RP1 peripheral space
|
|
+ ranges = <0xc0 0x40000000
|
|
+ 0x02000000 0x00 0x00000000
|
|
+ 0x00 0x00400000>;
|
|
+
|
|
+ dma-ranges =
|
|
+ // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
|
|
+ <0x10 0x00000000
|
|
+ 0x43000000 0x10 0x00000000
|
|
+ 0x10 0x00000000>,
|
|
+
|
|
+ // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx
|
|
+ // This allows the RP1 DMA controller to address RP1 hardware
|
|
+ <0xc0 0x40000000
|
|
+ 0x02000000 0x0 0x00000000
|
|
+ 0x0 0x00400000>,
|
|
+
|
|
+ // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
|
|
+ <0x00 0x00000000
|
|
+ 0x02000000 0x10 0x00000000
|
|
+ 0x10 0x00000000>;
|
|
+};
|
|
+
|
|
+// Expose RP1 nodes as system nodes with labels
|
|
+
|
|
+&rp1_dma {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rp1_eth {
|
|
+ status = "okay";
|
|
+ phy-handle = <&phy1>;
|
|
+ phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>;
|
|
+ phy-reset-duration = <5>;
|
|
+
|
|
+ phy1: ethernet-phy@1 {
|
|
+ reg = <0x1>;
|
|
+ brcm,powerdown-enable;
|
|
+ };
|
|
+};
|
|
+
|
|
+gpio: &rp1_gpio {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+aux: &dummy {};
|
|
+
|
|
+&rp1_usb0 {
|
|
+ pinctrl-0 = <&usb_vbus_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rp1_usb1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+#include "bcm2712-rpi.dtsi"
|
|
+
|
|
+// A few extra labels to keep overlays happy
|
|
+
|
|
+i2c0if: &rp1_gpio {};
|
|
+i2c0mux: &rp1_gpio {};
|
|
+
|
|
+i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only
|
|
+ pinctrl-0 = <&rp1_i2c6_38_39>;
|
|
+ pinctrl-names = "default";
|
|
+};
|
|
+
|
|
+i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only
|
|
+ pinctrl-0 = <&rp1_i2c4_40_41>;
|
|
+ pinctrl-names = "default";
|
|
+};
|
|
+
|
|
+i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility
|
|
+
|
|
+csi0: &rp1_csi0 { };
|
|
+csi1: &rp1_csi1 { };
|
|
+dsi0: &rp1_dsi0 { };
|
|
+dsi1: &rp1_dsi1 { };
|
|
+dpi: &rp1_dpi { };
|
|
+vec: &rp1_vec { };
|
|
+dpi_gpio0: &rp1_dpi_24bit_gpio0 { };
|
|
+dpi_gpio1: &rp1_dpi_24bit_gpio2 { };
|
|
+dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { };
|
|
+dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { };
|
|
+dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { };
|
|
+dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { };
|
|
+dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { };
|
|
+dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { };
|
|
+dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { };
|
|
+dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { };
|
|
+
|
|
+/* Add the IOMMUs for some RP1 bus masters */
|
|
+
|
|
+&csi0 {
|
|
+ iommus = <&iommu5>;
|
|
+};
|
|
+
|
|
+&csi1 {
|
|
+ iommus = <&iommu5>;
|
|
+};
|
|
+
|
|
+&dsi0 {
|
|
+ iommus = <&iommu5>;
|
|
+};
|
|
+
|
|
+&dsi1 {
|
|
+ iommus = <&iommu5>;
|
|
+};
|
|
+
|
|
+&dpi {
|
|
+ iommus = <&iommu5>;
|
|
+};
|
|
+
|
|
+&vec {
|
|
+ iommus = <&iommu5>;
|
|
+};
|
|
+
|
|
+&ddc0 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&ddc1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi0 {
|
|
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
|
|
+ clock-names = "hdmi", "bvb", "audio", "cec";
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi1 {
|
|
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
|
|
+ clock-names = "hdmi", "bvb", "audio", "cec";
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hvs {
|
|
+ clocks = <&firmware_clocks 4>, <&firmware_clocks 16>;
|
|
+ clock-names = "core", "disp";
|
|
+};
|
|
+
|
|
+&mop {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&moplet {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve0 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&disp_intr {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+/* SDIO1 is used to drive the SD card */
|
|
+&sdio1 {
|
|
+ pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ vqmmc-supply = <&sd_io_1v8_reg>;
|
|
+ vmmc-supply = <&sd_vcc_reg>;
|
|
+ bus-width = <4>;
|
|
+ sd-uhs-sdr50;
|
|
+ sd-uhs-ddr50;
|
|
+ sd-uhs-sdr104;
|
|
+ //broken-cd;
|
|
+ //no-1-8-v;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl_aon {
|
|
+ emmc_aon_cd_pins: emmc_aon_cd_pins {
|
|
+ function = "sd_card_g";
|
|
+ pins = "aon_gpio5";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ /* Slight hack - only one PWM pin (status LED) is usable */
|
|
+ aon_pwm_1pin: aon_pwm_1pin {
|
|
+ function = "aon_pwm";
|
|
+ pins = "aon_gpio9";
|
|
+ };
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ pwr_button_pins: pwr_button_pins {
|
|
+ function = "gpio";
|
|
+ pins = "gpio20";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ wl_on_pins: wl_on_pins {
|
|
+ function = "gpio";
|
|
+ pins = "gpio28";
|
|
+ };
|
|
+
|
|
+ bt_shutdown_pins: bt_shutdown_pins {
|
|
+ function = "gpio";
|
|
+ pins = "gpio29";
|
|
+ };
|
|
+
|
|
+ emmc_sd_pulls: emmc_sd_pulls {
|
|
+ function = "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+};
|
|
+
|
|
+/* uarta communicates with the BT module */
|
|
+&uarta {
|
|
+ uart-has-rtscts;
|
|
+ auto-flow-control;
|
|
+ status = "okay";
|
|
+ clock-frequency = <96000000>;
|
|
+ pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ bluetooth: bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <3000000>;
|
|
+ shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>;
|
|
+ local-bd-address = [ 00 00 00 00 00 00 ];
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c_rp1boot {
|
|
+ clock-frequency = <400000>;
|
|
+ pinctrl-0 = <&i2c3_m4_agpio0_pins>;
|
|
+ pinctrl-names = "default";
|
|
+};
|
|
+
|
|
+/ {
|
|
+ chosen: chosen {
|
|
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ stdout-path = "serial10:115200n8";
|
|
+ };
|
|
+
|
|
+ fan: cooling_fan {
|
|
+ status = "disabled";
|
|
+ compatible = "pwm-fan";
|
|
+ #cooling-cells = <2>;
|
|
+ cooling-min-state = <0>;
|
|
+ cooling-max-state = <3>;
|
|
+ cooling-levels = <0 75 125 175 250>;
|
|
+ pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>;
|
|
+ rpm-regmap = <&rp1_pwm1>;
|
|
+ rpm-offset = <0x3c>;
|
|
+ };
|
|
+
|
|
+ pwr_button {
|
|
+ compatible = "gpio-keys";
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwr_button_pins>;
|
|
+ status = "okay";
|
|
+
|
|
+ pwr_key: pwr {
|
|
+ label = "pwr_button";
|
|
+ // linux,code = <205>; // KEY_SUSPEND
|
|
+ linux,code = <116>; // KEY_POWER
|
|
+ gpios = <&gio 20 GPIO_ACTIVE_LOW>;
|
|
+ debounce-interval = <50>; // ms
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&usb {
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_USB>;
|
|
+};
|
|
+
|
|
+/* SDIO2 drives the WLAN interface */
|
|
+&sdio2 {
|
|
+ pinctrl-0 = <&sdio2_30_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ bus-width = <4>;
|
|
+ vmmc-supply = <&wl_on_reg>;
|
|
+ sd-uhs-ddr50;
|
|
+ non-removable;
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ wifi: wifi@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
+ local-mac-address = [00 00 00 00 00 00];
|
|
+ };
|
|
+};
|
|
+
|
|
+&rpivid {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ spi10_gpio2: spi10_gpio2 {
|
|
+ function = "vc_spi0";
|
|
+ pins = "gpio2", "gpio3", "gpio4";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ spi10_cs_gpio1: spi10_cs_gpio1 {
|
|
+ function = "gpio";
|
|
+ pins = "gpio1";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+};
|
|
+
|
|
+spi10_pins: &spi10_gpio2 {};
|
|
+spi10_cs_pins: &spi10_cs_gpio1 {};
|
|
+
|
|
+&spi10 {
|
|
+ pinctrl-names = "default";
|
|
+ cs-gpios = <&gio 1 1>;
|
|
+ pinctrl-0 = <&spi10_pins &spi10_cs_pins>;
|
|
+
|
|
+ spidev10: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <20000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+// =============================================
|
|
+// Board specific stuff here
|
|
+
|
|
+&gio_aon {
|
|
+ // Don't use GIO_AON as an interrupt controller because it will
|
|
+ // clash with the firmware monitoring the PMIC interrupt via the VPU.
|
|
+
|
|
+ /delete-property/ interrupt-controller;
|
|
+};
|
|
+
|
|
+&main_aon_irq {
|
|
+ // Don't use the MAIN_AON_IRQ interrupt controller because it will
|
|
+ // clash with the firmware monitoring the PMIC interrupt via the VPU.
|
|
+
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&rp1_pwm1 {
|
|
+ status = "disabled";
|
|
+ pinctrl-0 = <&rp1_pwm1_gpio45>;
|
|
+ pinctrl-names = "default";
|
|
+};
|
|
+
|
|
+&thermal_trips {
|
|
+ cpu_tepid: cpu-tepid {
|
|
+ temperature = <50000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+
|
|
+ cpu_warm: cpu-warm {
|
|
+ temperature = <60000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+
|
|
+ cpu_hot: cpu-hot {
|
|
+ temperature = <67500>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+
|
|
+ cpu_vhot: cpu-vhot {
|
|
+ temperature = <75000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+};
|
|
+
|
|
+&cooling_maps {
|
|
+ tepid {
|
|
+ trip = <&cpu_tepid>;
|
|
+ cooling-device = <&fan 1 1>;
|
|
+ };
|
|
+
|
|
+ warm {
|
|
+ trip = <&cpu_warm>;
|
|
+ cooling-device = <&fan 2 2>;
|
|
+ };
|
|
+
|
|
+ hot {
|
|
+ trip = <&cpu_hot>;
|
|
+ cooling-device = <&fan 3 3>;
|
|
+ };
|
|
+
|
|
+ vhot {
|
|
+ trip = <&cpu_vhot>;
|
|
+ cooling-device = <&fan 4 4>;
|
|
+ };
|
|
+
|
|
+ melt {
|
|
+ trip = <&cpu_crit>;
|
|
+ cooling-device = <&fan 4 4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gio {
|
|
+ // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank
|
|
+ // to reduce the clutter in gpioinfo/pinctrl
|
|
+ brcm,gpio-bank-widths = <32 4>;
|
|
+
|
|
+ gpio-line-names =
|
|
+ "-", // GPIO_000
|
|
+ "2712_BOOT_CS_N", // GPIO_001
|
|
+ "2712_BOOT_MISO", // GPIO_002
|
|
+ "2712_BOOT_MOSI", // GPIO_003
|
|
+ "2712_BOOT_SCLK", // GPIO_004
|
|
+ "-", // GPIO_005
|
|
+ "-", // GPIO_006
|
|
+ "-", // GPIO_007
|
|
+ "-", // GPIO_008
|
|
+ "-", // GPIO_009
|
|
+ "-", // GPIO_010
|
|
+ "-", // GPIO_011
|
|
+ "-", // GPIO_012
|
|
+ "-", // GPIO_013
|
|
+ "PCIE_SDA", // GPIO_014
|
|
+ "PCIE_SCL", // GPIO_015
|
|
+ "-", // GPIO_016
|
|
+ "-", // GPIO_017
|
|
+ "-", // GPIO_018
|
|
+ "-", // GPIO_019
|
|
+ "PWR_GPIO", // GPIO_020
|
|
+ "2712_G21_FS", // GPIO_021
|
|
+ "-", // GPIO_022
|
|
+ "-", // GPIO_023
|
|
+ "BT_RTS", // GPIO_024
|
|
+ "BT_CTS", // GPIO_025
|
|
+ "BT_TXD", // GPIO_026
|
|
+ "BT_RXD", // GPIO_027
|
|
+ "WL_ON", // GPIO_028
|
|
+ "BT_ON", // GPIO_029
|
|
+ "WIFI_SDIO_CLK", // GPIO_030
|
|
+ "WIFI_SDIO_CMD", // GPIO_031
|
|
+ "WIFI_SDIO_D0", // GPIO_032
|
|
+ "WIFI_SDIO_D1", // GPIO_033
|
|
+ "WIFI_SDIO_D2", // GPIO_034
|
|
+ "WIFI_SDIO_D3"; // GPIO_035
|
|
+};
|
|
+
|
|
+&gio_aon {
|
|
+ gpio-line-names =
|
|
+ "RP1_SDA", // AON_GPIO_00
|
|
+ "RP1_SCL", // AON_GPIO_01
|
|
+ "RP1_RUN", // AON_GPIO_02
|
|
+ "SD_IOVDD_SEL", // AON_GPIO_03
|
|
+ "SD_PWR_ON", // AON_GPIO_04
|
|
+ "SD_CDET_N", // AON_GPIO_05
|
|
+ "SD_FLG_N", // AON_GPIO_06
|
|
+ "-", // AON_GPIO_07
|
|
+ "2712_WAKE", // AON_GPIO_08
|
|
+ "2712_STAT_LED", // AON_GPIO_09
|
|
+ "-", // AON_GPIO_10
|
|
+ "-", // AON_GPIO_11
|
|
+ "PMIC_INT", // AON_GPIO_12
|
|
+ "UART_TX_FS", // AON_GPIO_13
|
|
+ "UART_RX_FS", // AON_GPIO_14
|
|
+ "-", // AON_GPIO_15
|
|
+ "-", // AON_GPIO_16
|
|
+
|
|
+ // Pad bank0 out to 32 entries
|
|
+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
|
|
+
|
|
+ "HDMI0_SCL", // AON_SGPIO_00
|
|
+ "HDMI0_SDA", // AON_SGPIO_01
|
|
+ "HDMI1_SCL", // AON_SGPIO_02
|
|
+ "HDMI1_SDA", // AON_SGPIO_03
|
|
+ "PMIC_SCL", // AON_SGPIO_04
|
|
+ "PMIC_SDA"; // AON_SGPIO_05
|
|
+
|
|
+ rp1_run_hog {
|
|
+ gpio-hog;
|
|
+ gpios = <2 GPIO_ACTIVE_HIGH>;
|
|
+ output-high;
|
|
+ line-name = "RP1 RUN pin";
|
|
+ };
|
|
+};
|
|
+
|
|
+&rp1_gpio {
|
|
+ gpio-line-names =
|
|
+ "ID_SD", // GPIO0
|
|
+ "ID_SC", // GPIO1
|
|
+ "PIN3", // GPIO2
|
|
+ "PIN5", // GPIO3
|
|
+ "PIN7", // GPIO4
|
|
+ "PIN29", // GPIO5
|
|
+ "PIN31", // GPIO6
|
|
+ "PIN26", // GPIO7
|
|
+ "PIN24", // GPIO8
|
|
+ "PIN21", // GPIO9
|
|
+ "PIN19", // GPIO10
|
|
+ "PIN23", // GPIO11
|
|
+ "PIN32", // GPIO12
|
|
+ "PIN33", // GPIO13
|
|
+ "PIN8", // GPIO14
|
|
+ "PIN10", // GPIO15
|
|
+ "PIN36", // GPIO16
|
|
+ "PIN11", // GPIO17
|
|
+ "PIN12", // GPIO18
|
|
+ "PIN35", // GPIO19
|
|
+ "PIN38", // GPIO20
|
|
+ "PIN40", // GPIO21
|
|
+ "PIN15", // GPIO22
|
|
+ "PIN16", // GPIO23
|
|
+ "PIN18", // GPIO24
|
|
+ "PIN22", // GPIO25
|
|
+ "PIN37", // GPIO26
|
|
+ "PIN13", // GPIO27
|
|
+
|
|
+ "PCIE_RP1_WAKE", // GPIO28
|
|
+ "FAN_TACH", // GPIO29
|
|
+ "HOST_SDA", // GPIO30
|
|
+ "HOST_SCL", // GPIO31
|
|
+ "ETH_RST_N", // GPIO32
|
|
+ "-", // GPIO33
|
|
+
|
|
+ "CD0_IO0_MICCLK", // GPIO34
|
|
+ "CD0_IO0_MICDAT0", // GPIO35
|
|
+ "RP1_PCIE_CLKREQ_N", // GPIO36
|
|
+ "-", // GPIO37
|
|
+ "CD0_SDA", // GPIO38
|
|
+ "CD0_SCL", // GPIO39
|
|
+ "CD1_SDA", // GPIO40
|
|
+ "CD1_SCL", // GPIO41
|
|
+ "USB_VBUS_EN", // GPIO42
|
|
+ "USB_OC_N", // GPIO43
|
|
+ "RP1_STAT_LED", // GPIO44
|
|
+ "FAN_PWM", // GPIO45
|
|
+ "CD1_IO0_MICCLK", // GPIO46
|
|
+ "2712_WAKE", // GPIO47
|
|
+ "CD1_IO1_MICDAT1", // GPIO48
|
|
+ "EN_MAX_USB_CUR", // GPIO49
|
|
+ "-", // GPIO50
|
|
+ "-", // GPIO51
|
|
+ "-", // GPIO52
|
|
+ "-"; // GPIO53
|
|
+
|
|
+ usb_vbus_pins: usb_vbus_pins {
|
|
+ function = "vbus1";
|
|
+ pins = "gpio42", "gpio43";
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ aliases: aliases {
|
|
+ blconfig = &blconfig;
|
|
+ bluetooth = &bluetooth;
|
|
+ console = &uart10;
|
|
+ ethernet0 = &rp1_eth;
|
|
+ wifi0 = &wifi;
|
|
+ fb = &fb;
|
|
+ mailbox = &mailbox;
|
|
+ mmc0 = &sdio1;
|
|
+ uart0 = &uart0;
|
|
+ uart1 = &uart1;
|
|
+ uart2 = &uart2;
|
|
+ uart3 = &uart3;
|
|
+ uart4 = &uart4;
|
|
+ uart10 = &uart10;
|
|
+ serial0 = &uart0;
|
|
+ serial1 = &uart1;
|
|
+ serial2 = &uart2;
|
|
+ serial3 = &uart3;
|
|
+ serial4 = &uart4;
|
|
+ serial10 = &uart10;
|
|
+ i2c = &i2c_arm;
|
|
+ i2c0 = &i2c0;
|
|
+ i2c1 = &i2c1;
|
|
+ i2c2 = &i2c2;
|
|
+ i2c3 = &i2c3;
|
|
+ i2c4 = &i2c4;
|
|
+ i2c5 = &i2c5;
|
|
+ i2c6 = &i2c6;
|
|
+ i2c10 = &i2c_rp1boot;
|
|
+ // Bit-bashed i2c_gpios start at 10
|
|
+ spi0 = &spi0;
|
|
+ spi1 = &spi1;
|
|
+ spi2 = &spi2;
|
|
+ spi3 = &spi3;
|
|
+ spi4 = &spi4;
|
|
+ spi5 = &spi5;
|
|
+ spi10 = &spi10;
|
|
+ gpio0 = &gpio;
|
|
+ gpio1 = &gio;
|
|
+ gpio2 = &gio_aon;
|
|
+ gpio3 = &pinctrl;
|
|
+ gpio4 = &pinctrl_aon;
|
|
+ usb0 = &rp1_usb0;
|
|
+ usb1 = &rp1_usb1;
|
|
+ drm_dsi1 = &dsi0;
|
|
+ drm_dsi2 = &dsi1;
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ bdaddr = <&bluetooth>, "local-bd-address[";
|
|
+ button_debounce = <&pwr_key>, "debounce-interval:0";
|
|
+ cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status";
|
|
+ uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0;
|
|
+ i2c0 = <&i2c0>, "status";
|
|
+ i2c1 = <&i2c1>, "status";
|
|
+ i2c = <&i2c1>, "status";
|
|
+ i2c_arm = <&i2c_arm>, "status";
|
|
+ i2c_vc = <&i2c_vc>, "status";
|
|
+ i2c_csi_dsi = <&i2c_csi_dsi>, "status";
|
|
+ i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status";
|
|
+ i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status";
|
|
+ i2c0_baudrate = <&i2c0>, "clock-frequency:0";
|
|
+ i2c1_baudrate = <&i2c1>, "clock-frequency:0";
|
|
+ i2c_baudrate = <&i2c_arm>, "clock-frequency:0";
|
|
+ i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0";
|
|
+ i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0";
|
|
+ nvme = <&pciex1>, "status";
|
|
+ pciex1 = <&pciex1>, "status";
|
|
+ pciex1_gen = <&pciex1> , "max-link-speed:0";
|
|
+ pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?";
|
|
+ random = <&random>, "status";
|
|
+ rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0";
|
|
+ spi = <&spi0>, "status";
|
|
+ suspend = <&pwr_key>, "linux,code:0=205";
|
|
+ uart0 = <&uart0>, "status";
|
|
+ wifiaddr = <&wifi>, "local-mac-address[";
|
|
+
|
|
+ act_led_activelow = <&act_led>, "active-low?";
|
|
+ act_led_trigger = <&act_led>, "linux,default-trigger";
|
|
+ pwr_led_activelow = <&pwr_led>, "gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>, "linux,default-trigger";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi
|
|
@@ -0,0 +1,281 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+
|
|
+#include <dt-bindings/power/raspberrypi-power.h>
|
|
+
|
|
+&soc {
|
|
+ firmware: firmware {
|
|
+ compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ mboxes = <&mailbox>;
|
|
+ dma-ranges;
|
|
+
|
|
+ firmware_clocks: clocks {
|
|
+ compatible = "raspberrypi,firmware-clocks";
|
|
+ #clock-cells = <1>;
|
|
+ };
|
|
+
|
|
+ reset: reset {
|
|
+ compatible = "raspberrypi,firmware-reset";
|
|
+ #reset-cells = <1>;
|
|
+ };
|
|
+
|
|
+ vcio: vcio {
|
|
+ compatible = "raspberrypi,vcio";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ power: power {
|
|
+ compatible = "raspberrypi,bcm2835-power";
|
|
+ firmware = <&firmware>;
|
|
+ #power-domain-cells = <1>;
|
|
+ };
|
|
+
|
|
+ fb: fb {
|
|
+ compatible = "brcm,bcm2708-fb";
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ rpi_rtc: rpi_rtc {
|
|
+ compatible = "raspberrypi,rpi-rtc";
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ trickle-charge-microvolt = <0>;
|
|
+ };
|
|
+
|
|
+ /* Define these notional regulators for use by overlays, etc. */
|
|
+ vdd_3v3_reg: fixedregulator_3v3 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-always-on;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-name = "3v3";
|
|
+ };
|
|
+
|
|
+ vdd_5v0_reg: fixedregulator_5v0 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-always-on;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-name = "5v0";
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ arm_freq;
|
|
+ };
|
|
+};
|
|
+
|
|
+pciex1: &pcie1 { };
|
|
+pciex4: &pcie2 { };
|
|
+
|
|
+&dma32 {
|
|
+ /* The VPU firmware uses DMA channel 11 for VCHIQ */
|
|
+ brcm,dma-channel-mask = <0x03f>;
|
|
+};
|
|
+
|
|
+&dma40 {
|
|
+ /* The VPU firmware DMA channel 11 for VCHIQ */
|
|
+ brcm,dma-channel-mask = <0x07c0>;
|
|
+};
|
|
+
|
|
+&hdmi0 {
|
|
+ dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
|
|
+};
|
|
+
|
|
+&hdmi1 {
|
|
+ dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
|
|
+};
|
|
+
|
|
+&spi10 {
|
|
+ dmas = <&dma40 6>, <&dma40 7>;
|
|
+ dma-names = "tx", "rx";
|
|
+};
|
|
+
|
|
+&usb {
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_USB>;
|
|
+};
|
|
+
|
|
+&rmem {
|
|
+ /*
|
|
+ * RPi4's co-processor will copy the board's bootloader configuration
|
|
+ * into memory for the OS to consume. It'll also update this node with
|
|
+ * its placement information.
|
|
+ */
|
|
+ blconfig: nvram@0 {
|
|
+ compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ reg = <0x0 0x0 0x0>;
|
|
+ no-map;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&rp1_adc {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/* Add some gpiomem nodes to make the devices accessible to userspace.
|
|
+ * /dev/gpiomem<n> should expose the registers for the interface with DT alias
|
|
+ * gpio<n>.
|
|
+ */
|
|
+
|
|
+&rp1 {
|
|
+ gpiomem@d0000 {
|
|
+ /* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */
|
|
+ compatible = "raspberrypi,gpiomem";
|
|
+ reg = <0xc0 0x400d0000 0x0 0x30000>;
|
|
+ chardev-name = "gpiomem0";
|
|
+ };
|
|
+};
|
|
+
|
|
+&soc {
|
|
+ gpiomem@7d508500 {
|
|
+ compatible = "raspberrypi,gpiomem";
|
|
+ reg = <0x7d508500 0x40>;
|
|
+ chardev-name = "gpiomem1";
|
|
+ };
|
|
+
|
|
+ gpiomem@7d517c00 {
|
|
+ compatible = "raspberrypi,gpiomem";
|
|
+ reg = <0x7d517c00 0x40>;
|
|
+ chardev-name = "gpiomem2";
|
|
+ };
|
|
+
|
|
+ gpiomem@7d504100 {
|
|
+ compatible = "raspberrypi,gpiomem";
|
|
+ reg = <0x7d504100 0x20>;
|
|
+ chardev-name = "gpiomem3";
|
|
+ };
|
|
+
|
|
+ gpiomem@7d510700 {
|
|
+ compatible = "raspberrypi,gpiomem";
|
|
+ reg = <0x7d510700 0x20>;
|
|
+ chardev-name = "gpiomem4";
|
|
+ };
|
|
+};
|
|
+
|
|
+i2c0: &rp1_i2c0 { };
|
|
+i2c1: &rp1_i2c1 { };
|
|
+i2c2: &rp1_i2c2 { };
|
|
+i2c3: &rp1_i2c3 { };
|
|
+i2c4: &rp1_i2c4 { };
|
|
+i2c5: &rp1_i2c5 { };
|
|
+i2c6: &rp1_i2c6 { };
|
|
+i2s: &rp1_i2s0 { };
|
|
+i2s_clk_producer: &rp1_i2s0 { };
|
|
+i2s_clk_consumer: &rp1_i2s1 { };
|
|
+pwm0: &rp1_pwm0 { };
|
|
+pwm1: &rp1_pwm1 { };
|
|
+pwm: &pwm0 { };
|
|
+spi0: &rp1_spi0 { };
|
|
+spi1: &rp1_spi1 { };
|
|
+spi2: &rp1_spi2 { };
|
|
+spi3: &rp1_spi3 { };
|
|
+spi4: &rp1_spi4 { };
|
|
+spi5: &rp1_spi5 { };
|
|
+
|
|
+uart0_pins: &rp1_uart0_14_15 {};
|
|
+uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {};
|
|
+uart0: &rp1_uart0 {
|
|
+ pinctrl-0 = <&uart0_pins>;
|
|
+};
|
|
+
|
|
+uart1_pins: &rp1_uart1_0_1 {};
|
|
+uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {};
|
|
+uart1: &rp1_uart1 { };
|
|
+
|
|
+uart2_pins: &rp1_uart2_4_5 {};
|
|
+uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {};
|
|
+uart2: &rp1_uart2 { };
|
|
+
|
|
+uart3_pins: &rp1_uart3_8_9 {};
|
|
+uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {};
|
|
+uart3: &rp1_uart3 { };
|
|
+
|
|
+uart4_pins: &rp1_uart4_12_13 {};
|
|
+uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {};
|
|
+uart4: &rp1_uart4 { };
|
|
+
|
|
+i2c_vc: &i2c0 { // This is pins 27,28 on the header (not MIPI)
|
|
+ pinctrl-0 = <&rp1_i2c0_0_1>;
|
|
+ pinctrl-names = "default";
|
|
+};
|
|
+
|
|
+i2c_arm: &i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rp1_i2c1_2_3>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rp1_i2c2_4_5>;
|
|
+};
|
|
+
|
|
+&i2c3 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rp1_i2c3_6_7>;
|
|
+};
|
|
+
|
|
+&i2s_clk_producer {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rp1_i2s0_18_21>;
|
|
+};
|
|
+
|
|
+&i2s_clk_consumer {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rp1_i2s1_18_21>;
|
|
+};
|
|
+
|
|
+spi0_pins: &rp1_spi0_gpio9 {};
|
|
+spi0_cs_pins: &rp1_spi0_cs_gpio7 {};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+spi2_pins: &rp1_spi2_gpio1 {};
|
|
+&spi2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi2_pins>;
|
|
+};
|
|
+
|
|
+spi3_pins: &rp1_spi3_gpio5 {};
|
|
+&spi3 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi3_pins>;
|
|
+};
|
|
+
|
|
+spi4_pins: &rp1_spi4_gpio9 {};
|
|
+&spi4 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi4_pins>;
|
|
+};
|
|
+
|
|
+spi5_pins: &rp1_spi5_gpio13 {};
|
|
+&spi5 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi5_pins>;
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/broadcom/bcm2712.dtsi
|
|
@@ -0,0 +1,1286 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
+#include <dt-bindings/soc/bcm2835-pm.h>
|
|
+#include <dt-bindings/phy/phy.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712", "brcm,bcm2711";
|
|
+ model = "BCM2712";
|
|
+
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ interrupt-parent = <&gicv2>;
|
|
+
|
|
+ rmem: reserved-memory {
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+
|
|
+ atf@0 {
|
|
+ reg = <0x0 0x0 0x80000>;
|
|
+ no-map;
|
|
+ };
|
|
+
|
|
+ cma: linux,cma {
|
|
+ compatible = "shared-dma-pool";
|
|
+ size = <0x4000000>; /* 64MB */
|
|
+ reusable;
|
|
+ linux,cma-default;
|
|
+
|
|
+ /*
|
|
+ * arm64 reserves the CMA by default somewhere in
|
|
+ * ZONE_DMA32, that's not good enough for the BCM2711
|
|
+ * as some devices can only address the lower 1G of
|
|
+ * memory (ZONE_DMA).
|
|
+ */
|
|
+ alloc-ranges = <0x0 0x00000000 0x40000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ thermal-zones {
|
|
+ cpu_thermal: cpu-thermal {
|
|
+ polling-delay-passive = <2000>;
|
|
+ polling-delay = <1000>;
|
|
+ coefficients = <(-550) 450000>;
|
|
+ thermal-sensors = <&thermal>;
|
|
+
|
|
+ thermal_trips: trips {
|
|
+ cpu_crit: cpu-crit {
|
|
+ temperature = <110000>;
|
|
+ hysteresis = <0>;
|
|
+ type = "critical";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cooling_maps: cooling-maps {
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ clk_27MHz: clk-27M {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <27000000>;
|
|
+ clock-output-names = "27MHz-clock";
|
|
+ };
|
|
+
|
|
+ clk_108MHz: clk-108M {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <108000000>;
|
|
+ clock-output-names = "108MHz-clock";
|
|
+ };
|
|
+
|
|
+ hvs: hvs@107c580000 {
|
|
+ compatible = "brcm,bcm2712-hvs";
|
|
+ reg = <0x10 0x7c580000 0x1a000>;
|
|
+ interrupt-parent = <&disp_intr>;
|
|
+ interrupts = <2>, <9>, <16>;
|
|
+ interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof";
|
|
+ //iommus = <&iommu4>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ soc: soc {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ ranges = <0x7c000000 0x10 0x7c000000 0x04000000>;
|
|
+ /* Emulate a contiguous 30-bit address range for DMA */
|
|
+ dma-ranges = <0xc0000000 0x00 0x00000000 0x40000000>,
|
|
+ <0x7c000000 0x10 0x7c000000 0x04000000>;
|
|
+
|
|
+ system_timer: timer@7c003000 {
|
|
+ compatible = "brcm,bcm2835-system-timer";
|
|
+ reg = <0x7c003000 0x1000>;
|
|
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clock-frequency = <1000000>;
|
|
+ };
|
|
+
|
|
+ firmwarekms: firmwarekms@7d503000 {
|
|
+ compatible = "raspberrypi,rpi-firmware-kms";
|
|
+ /* SUN_L2 interrupt reg */
|
|
+ reg = <0x7d503000 0x18>;
|
|
+ interrupt-parent = <&cpu_l2_irq>;
|
|
+ interrupts = <19>;
|
|
+ brcm,firmware = <&firmware>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ mailbox: mailbox@7c013880 {
|
|
+ compatible = "brcm,bcm2835-mbox";
|
|
+ reg = <0x7c013880 0x40>;
|
|
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ #mbox-cells = <0>;
|
|
+ };
|
|
+
|
|
+ pixelvalve0: pixelvalve@7c410000 {
|
|
+ compatible = "brcm,bcm2712-pixelvalve0";
|
|
+ reg = <0x7c410000 0x100>;
|
|
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pixelvalve1: pixelvalve@7c411000 {
|
|
+ compatible = "brcm,bcm2712-pixelvalve1";
|
|
+ reg = <0x7c411000 0x100>;
|
|
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ usb: usb@7c480000 {
|
|
+ compatible = "brcm,bcm2835-usb";
|
|
+ reg = <0x7c480000 0x10000>;
|
|
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ clocks = <&clk_usb>;
|
|
+ clock-names = "otg";
|
|
+ phys = <&usbphy>;
|
|
+ phy-names = "usb2-phy";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ mop: mop@7c500000 {
|
|
+ compatible = "brcm,bcm2712-mop";
|
|
+ reg = <0x7c500000 0x20>;
|
|
+ interrupt-parent = <&disp_intr>;
|
|
+ interrupts = <1>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ moplet: moplet@7c501000 {
|
|
+ compatible = "brcm,bcm2712-moplet";
|
|
+ reg = <0x7c501000 0x20>;
|
|
+ interrupt-parent = <&disp_intr>;
|
|
+ interrupts = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ disp_intr: interrupt-controller@7c502000 {
|
|
+ compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
|
|
+ reg = <0x7c502000 0x30>;
|
|
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ dvp: clock@7c700000 {
|
|
+ compatible = "brcm,brcm2711-dvp";
|
|
+ reg = <0x7c700000 0x10>;
|
|
+ clocks = <&clk_108MHz>;
|
|
+ #clock-cells = <1>;
|
|
+ #reset-cells = <1>;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * This node is the provider for the enable-method for
|
|
+ * bringing up secondary cores.
|
|
+ */
|
|
+ local_intc: local_intc@7cd00000 {
|
|
+ compatible = "brcm,bcm2836-l1-intc";
|
|
+ reg = <0x7cd00000 0x100>;
|
|
+ };
|
|
+
|
|
+ uart0: serial@7d001000 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7d001000 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_uart>,
|
|
+ <&clk_vpu>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart2: serial@7d001400 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7d001400 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_uart>,
|
|
+ <&clk_vpu>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart3: serial@7d001600 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7d001600 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_uart>,
|
|
+ <&clk_vpu>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart4: serial@7d001800 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7d001800 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_uart>,
|
|
+ <&clk_vpu>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart5: serial@7d001a00 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7d001a00 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_uart>,
|
|
+ <&clk_vpu>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sdhost: mmc@7d002000 {
|
|
+ compatible = "brcm,bcm2835-sdhost";
|
|
+ reg = <0x7d002000 0x100>;
|
|
+ //interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2s: i2s@7d003000 {
|
|
+ compatible = "brcm,bcm2835-i2s";
|
|
+ reg = <0x7d003000 0x24>;
|
|
+ //clocks = <&cprman BCM2835_CLOCK_PCM>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi0: spi@7d004000 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7d004000 0x200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ num-cs = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi3: spi@7d004600 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7d004600 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi4: spi@7d004800 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7d004800 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi5: spi@7d004a00 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7d004a00 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi6: spi@7d004c00 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7d004c00 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c0: i2c@7d005000 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7d005000 0x20>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c3: i2c@7d005600 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7d005600 0x20>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c4: i2c@7d005800 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7d005800 0x20>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c5: i2c@7d005a00 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7d005a00 0x20>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c6: i2c@7d005c00 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7d005c00 0x20>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c8: i2c@7d005e00 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7d005e00 0x20>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_vpu>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pwm0: pwm@7d00c000 {
|
|
+ compatible = "brcm,bcm2835-pwm";
|
|
+ reg = <0x7d00c000 0x28>;
|
|
+ assigned-clock-rates = <10000000>;
|
|
+ #pwm-cells = <3>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pwm1: pwm@7d00c800 {
|
|
+ compatible = "brcm,bcm2835-pwm";
|
|
+ reg = <0x7d00c800 0x28>;
|
|
+ assigned-clock-rates = <10000000>;
|
|
+ #pwm-cells = <3>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pm: watchdog@7d200000 {
|
|
+ compatible = "brcm,bcm2712-pm";
|
|
+ reg = <0x7d200000 0x308>;
|
|
+ reg-names = "pm";
|
|
+ #power-domain-cells = <1>;
|
|
+ #reset-cells = <1>;
|
|
+ //clocks = <&cprman BCM2835_CLOCK_V3D>,
|
|
+ // <&cprman BCM2835_CLOCK_PERI_IMAGE>,
|
|
+ // <&cprman BCM2835_CLOCK_H264>,
|
|
+ // <&cprman BCM2835_CLOCK_ISP>;
|
|
+ clock-names = "v3d", "peri_image", "h264", "isp";
|
|
+ system-power-controller;
|
|
+ };
|
|
+
|
|
+ cprman: cprman@7d202000 {
|
|
+ compatible = "brcm,bcm2711-cprman";
|
|
+ reg = <0x7d202000 0x2000>;
|
|
+ #clock-cells = <1>;
|
|
+
|
|
+ /* CPRMAN derives almost everything from the
|
|
+ * platform's oscillator. However, the DSI
|
|
+ * pixel clocks come from the DSI analog PHY.
|
|
+ */
|
|
+ clocks = <&clk_osc>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ random: rng@7d208000 {
|
|
+ compatible = "brcm,bcm2711-rng200";
|
|
+ reg = <0x7d208000 0x28>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ cpu_l2_irq: intc@7d503000 {
|
|
+ compatible = "brcm,l2-intc";
|
|
+ reg = <0x7d503000 0x18>;
|
|
+ interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ };
|
|
+
|
|
+ pinctrl: pinctrl@7d504100 {
|
|
+ compatible = "brcm,bcm2712-pinctrl";
|
|
+ reg = <0x7d504100 0x30>;
|
|
+
|
|
+ uarta_24_pins: uarta_24_pins {
|
|
+ pin_rts {
|
|
+ function = "uart0";
|
|
+ pins = "gpio24";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_cts {
|
|
+ function = "uart0";
|
|
+ pins = "gpio25";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin_txd {
|
|
+ function = "uart0";
|
|
+ pins = "gpio26";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_rxd {
|
|
+ function = "uart0";
|
|
+ pins = "gpio27";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio2_30_pins: sdio2_30_pins {
|
|
+ pin_clk {
|
|
+ function = "sd2";
|
|
+ pins = "gpio30";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_cmd {
|
|
+ function = "sd2";
|
|
+ pins = "gpio31";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pins_dat {
|
|
+ function = "sd2";
|
|
+ pins = "gpio32", "gpio33", "gpio34", "gpio35";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ddc0: i2c@7d508200 {
|
|
+ compatible = "brcm,brcmstb-i2c";
|
|
+ reg = <0x7d508200 0x58>;
|
|
+ interrupt-parent = <&bsc_irq>;
|
|
+ interrupts = <1>;
|
|
+ clock-frequency = <200000>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ ddc1: i2c@7d508280 {
|
|
+ compatible = "brcm,brcmstb-i2c";
|
|
+ reg = <0x7d508280 0x58>;
|
|
+ interrupt-parent = <&bsc_irq>;
|
|
+ interrupts = <2>;
|
|
+ clock-frequency = <200000>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ bscd: i2c@7d508300 {
|
|
+ compatible = "brcm,brcmstb-i2c";
|
|
+ reg = <0x7d508300 0x58>;
|
|
+ interrupt-parent = <&bsc_irq>;
|
|
+ interrupts = <0>;
|
|
+ clock-frequency = <200000>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ bsc_irq: intc@7d508380 {
|
|
+ compatible = "brcm,bcm7271-l2-intc";
|
|
+ reg = <0x7d508380 0x10>;
|
|
+ interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ };
|
|
+
|
|
+ main_irq: intc@7d508400 {
|
|
+ compatible = "brcm,bcm7271-l2-intc";
|
|
+ reg = <0x7d508400 0x10>;
|
|
+ interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ };
|
|
+
|
|
+ gio: gpio@7d508500 {
|
|
+ compatible = "brcm,brcmstb-gpio";
|
|
+ reg = <0x7d508500 0x40>;
|
|
+ interrupt-parent = <&main_irq>;
|
|
+ interrupts = <0>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+ brcm,gpio-bank-widths = <32 22>;
|
|
+ brcm,gpio-direct;
|
|
+ };
|
|
+
|
|
+ uarta: serial@7d50c000 {
|
|
+ compatible = "brcm,bcm7271-uart";
|
|
+ reg = <0x7d50c000 0x20>;
|
|
+ reg-names = "uart";
|
|
+ reg-shift = <2>;
|
|
+ reg-io-width = <4>;
|
|
+ interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uartb: serial@7d50d000 {
|
|
+ compatible = "brcm,bcm7271-uart";
|
|
+ reg = <0x7d50d000 0x20>;
|
|
+ reg-names = "uart";
|
|
+ reg-shift = <2>;
|
|
+ reg-io-width = <4>;
|
|
+ interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uartc: serial@7d50e000 {
|
|
+ compatible = "brcm,bcm7271-uart";
|
|
+ reg = <0x7d50e000 0x20>;
|
|
+ reg-names = "uart";
|
|
+ reg-shift = <2>;
|
|
+ reg-io-width = <4>;
|
|
+ interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ aon_intr: interrupt-controller@7d510600 {
|
|
+ compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
|
|
+ reg = <0x7d510600 0x30>;
|
|
+ interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pinctrl_aon: pinctrl@7d510700 {
|
|
+ compatible = "brcm,bcm2712-aon-pinctrl";
|
|
+ reg = <0x7d510700 0x20>;
|
|
+
|
|
+ i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins {
|
|
+ function = "vc_i2c3";
|
|
+ pins = "aon_gpio0", "aon_gpio1";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ bsc_m1_agpio13_pins: bsc_m1_agpio13_pins {
|
|
+ function = "bsc_m1";
|
|
+ pins = "aon_gpio13", "aon_gpio14";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins {
|
|
+ function = "avs_pmu_bsc";
|
|
+ pins = "aon_sgpio4", "aon_sgpio5";
|
|
+ };
|
|
+
|
|
+ bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins {
|
|
+ function = "bsc_m2";
|
|
+ pins = "aon_sgpio4", "aon_sgpio5";
|
|
+ };
|
|
+
|
|
+ pwm_aon_agpio1_pins: pwm_aon_agpio1_pins {
|
|
+ function = "aon_pwm";
|
|
+ pins = "aon_gpio1", "aon_gpio2";
|
|
+ };
|
|
+
|
|
+ pwm_aon_agpio4_pins: pwm_aon_agpio4_pins {
|
|
+ function = "vc_pwm0";
|
|
+ pins = "aon_gpio4", "aon_gpio5";
|
|
+ };
|
|
+
|
|
+ pwm_aon_agpio7_pins: pwm_aon_agpio7_pins {
|
|
+ function = "aon_pwm";
|
|
+ pins = "aon_gpio7", "aon_gpio9";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ intc@7d517000 {
|
|
+ compatible = "brcm,bcm7271-l2-intc";
|
|
+ reg = <0x7d517000 0x10>;
|
|
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ bscc: i2c@7d517a00 {
|
|
+ compatible = "brcm,brcmstb-i2c";
|
|
+ reg = <0x7d517a00 0x58>;
|
|
+ interrupt-parent = <&bsc_aon_irq>;
|
|
+ interrupts = <0>;
|
|
+ clock-frequency = <200000>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pwm_aon: pwm@7d517a80 {
|
|
+ compatible = "brcm,bcm7038-pwm";
|
|
+ reg = <0x7d517a80 0x28>;
|
|
+ #pwm-cells = <2>;
|
|
+ clocks = <&clk_27MHz>;
|
|
+ };
|
|
+
|
|
+ main_aon_irq: intc@7d517ac0 {
|
|
+ compatible = "brcm,bcm7271-l2-intc";
|
|
+ reg = <0x7d517ac0 0x10>;
|
|
+ interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ };
|
|
+
|
|
+ bsc_aon_irq: intc@7d517b00 {
|
|
+ compatible = "brcm,bcm7271-l2-intc";
|
|
+ reg = <0x7d517b00 0x10>;
|
|
+ interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ };
|
|
+
|
|
+ gio_aon: gpio@7d517c00 {
|
|
+ compatible = "brcm,brcmstb-gpio";
|
|
+ reg = <0x7d517c00 0x40>;
|
|
+ interrupt-parent = <&main_aon_irq>;
|
|
+ interrupts = <0>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+ brcm,gpio-bank-widths = <17 6>;
|
|
+ brcm,gpio-direct;
|
|
+ };
|
|
+
|
|
+ avs_monitor: avs-monitor@7d542000 {
|
|
+ compatible = "brcm,bcm2711-avs-monitor",
|
|
+ "syscon", "simple-mfd";
|
|
+ reg = <0x7d542000 0xf00>;
|
|
+ status = "okay";
|
|
+
|
|
+ thermal: thermal {
|
|
+ compatible = "brcm,bcm2711-thermal";
|
|
+ #thermal-sensor-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ bsc_pmu: i2c@7d544000 {
|
|
+ compatible = "brcm,brcmstb-i2c";
|
|
+ reg = <0x7d544000 0x58>;
|
|
+ interrupt-parent = <&bsc_aon_irq>;
|
|
+ interrupts = <1>;
|
|
+ clock-frequency = <200000>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ hdmi0: hdmi@7ef00700 {
|
|
+ compatible = "brcm,bcm2712-hdmi0";
|
|
+ reg = <0x7c701400 0x300>,
|
|
+ <0x7c701000 0x200>,
|
|
+ <0x7c701d00 0x300>,
|
|
+ <0x7c702000 0x80>,
|
|
+ <0x7c703800 0x200>,
|
|
+ <0x7c704000 0x800>,
|
|
+ <0x7c700100 0x80>,
|
|
+ <0x7d510800 0x100>,
|
|
+ <0x7c720000 0x100>;
|
|
+ reg-names = "hdmi",
|
|
+ "dvp",
|
|
+ "phy",
|
|
+ "rm",
|
|
+ "packet",
|
|
+ "metadata",
|
|
+ "csc",
|
|
+ "cec",
|
|
+ "hd";
|
|
+ resets = <&dvp 1>;
|
|
+ interrupt-parent = <&aon_intr>;
|
|
+ interrupts = <1>, <2>, <3>,
|
|
+ <7>, <8>;
|
|
+ interrupt-names = "cec-tx", "cec-rx", "cec-low",
|
|
+ "hpd-connected", "hpd-removed";
|
|
+ ddc = <&ddc0>;
|
|
+ dmas = <&dma32 10>;
|
|
+ dma-names = "audio-rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ hdmi1: hdmi@7ef05700 {
|
|
+ compatible = "brcm,bcm2712-hdmi1";
|
|
+ reg = <0x7c706400 0x300>,
|
|
+ <0x7c706000 0x200>,
|
|
+ <0x7c706d00 0x300>,
|
|
+ <0x7c707000 0x80>,
|
|
+ <0x7c708800 0x200>,
|
|
+ <0x7c709000 0x800>,
|
|
+ <0x7c700180 0x80>,
|
|
+ <0x7d511000 0x100>,
|
|
+ <0x7c720000 0x100>;
|
|
+ reg-names = "hdmi",
|
|
+ "dvp",
|
|
+ "phy",
|
|
+ "rm",
|
|
+ "packet",
|
|
+ "metadata",
|
|
+ "csc",
|
|
+ "cec",
|
|
+ "hd";
|
|
+ ddc = <&ddc1>;
|
|
+ resets = <&dvp 2>;
|
|
+ interrupt-parent = <&aon_intr>;
|
|
+ interrupts = <11>, <12>, <13>,
|
|
+ <14>, <15>;
|
|
+ interrupt-names = "cec-tx", "cec-rx", "cec-low",
|
|
+ "hpd-connected", "hpd-removed";
|
|
+ dmas = <&dma32 17>;
|
|
+ dma-names = "audio-rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sound: sound {
|
|
+ };
|
|
+ };
|
|
+
|
|
+ arm-pmu {
|
|
+ compatible = "arm,cortex-a76-pmu";
|
|
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
|
|
+ };
|
|
+
|
|
+ timer {
|
|
+ compatible = "arm,armv8-timer";
|
|
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>;
|
|
+ /* This only applies to the ARMv7 stub */
|
|
+ arm,cpu-registers-not-fw-configured;
|
|
+ };
|
|
+
|
|
+ cpus: cpus {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
|
|
+
|
|
+ cpu0: cpu@0 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a76";
|
|
+ reg = <0x000>;
|
|
+ enable-method = "psci";
|
|
+ next-level-cache = <&l2_cache>;
|
|
+ };
|
|
+
|
|
+ cpu1: cpu@1 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a76";
|
|
+ reg = <0x100>;
|
|
+ enable-method = "psci";
|
|
+ next-level-cache = <&l2_cache>;
|
|
+ };
|
|
+
|
|
+ cpu2: cpu@2 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a76";
|
|
+ reg = <0x200>;
|
|
+ enable-method = "psci";
|
|
+ next-level-cache = <&l2_cache>;
|
|
+ };
|
|
+
|
|
+ cpu3: cpu@3 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a76";
|
|
+ reg = <0x300>;
|
|
+ enable-method = "psci";
|
|
+ next-level-cache = <&l2_cache>;
|
|
+ };
|
|
+
|
|
+ l2_cache: l2-cache {
|
|
+ compatible = "cache";
|
|
+ next-level-cache = <&l3_cache>;
|
|
+ };
|
|
+
|
|
+ l3_cache: l3-cache {
|
|
+ compatible = "cache";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ psci {
|
|
+ method = "smc";
|
|
+ compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
|
|
+ cpu_on = <0xc4000003>;
|
|
+ cpu_suspend = <0xc4000001>;
|
|
+ cpu_off = <0x84000002>;
|
|
+ };
|
|
+
|
|
+ axi: axi {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+
|
|
+ ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
|
|
+ <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
|
|
+ <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
|
|
+ <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
|
|
+ <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
|
|
+
|
|
+ dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>,
|
|
+ <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>,
|
|
+ <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>,
|
|
+ <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
|
|
+ <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
|
|
+
|
|
+ vc4: gpu {
|
|
+ compatible = "brcm,bcm2712-vc6";
|
|
+ };
|
|
+
|
|
+ iommu2: iommu@5100 {
|
|
+ /* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */
|
|
+ compatible = "brcm,bcm2712-iommu";
|
|
+ reg = <0x10 0x5100 0x0 0x80>;
|
|
+ cache = <&iommuc>;
|
|
+ #iommu-cells = <0>;
|
|
+ };
|
|
+
|
|
+ iommu4: iommu@5200 {
|
|
+ /* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */
|
|
+ compatible = "brcm,bcm2712-iommu";
|
|
+ reg = <0x10 0x5200 0x0 0x80>;
|
|
+ cache = <&iommuc>;
|
|
+ #iommu-cells = <0>;
|
|
+ #interconnect-cells = <0>;
|
|
+ };
|
|
+
|
|
+ iommu5: iommu@5280 {
|
|
+ /* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */
|
|
+ compatible = "brcm,bcm2712-iommu";
|
|
+ reg = <0x10 0x5280 0x0 0x80>;
|
|
+ cache = <&iommuc>;
|
|
+ #iommu-cells = <0>;
|
|
+ dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe
|
|
+ };
|
|
+
|
|
+ iommuc: iommuc@5b00 {
|
|
+ compatible = "brcm,bcm2712-iommuc";
|
|
+ reg = <0x10 0x5b00 0x0 0x80>;
|
|
+ };
|
|
+
|
|
+ dma32: dma@10000 {
|
|
+ compatible = "brcm,bcm2712-dma";
|
|
+ reg = <0x10 0x00010000 0 0x600>;
|
|
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "dma0",
|
|
+ "dma1",
|
|
+ "dma2",
|
|
+ "dma3",
|
|
+ "dma4",
|
|
+ "dma5";
|
|
+ #dma-cells = <1>;
|
|
+ brcm,dma-channel-mask = <0x0035>;
|
|
+ };
|
|
+
|
|
+ dma40: dma@10600 {
|
|
+ compatible = "brcm,bcm2712-dma";
|
|
+ reg = <0x10 0x00010600 0 0x600>;
|
|
+ interrupts =
|
|
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, /* dma4 6 */
|
|
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dma4 7 */
|
|
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dma4 8 */
|
|
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 9 */
|
|
+ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 10 */
|
|
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; /* dma4 11 */
|
|
+ interrupt-names = "dma6",
|
|
+ "dma7",
|
|
+ "dma8",
|
|
+ "dma9",
|
|
+ "dma10",
|
|
+ "dma11";
|
|
+ #dma-cells = <1>;
|
|
+ brcm,dma-channel-mask = <0x0fc0>;
|
|
+ };
|
|
+
|
|
+ // Single-lane Gen3 PCIe
|
|
+ // Outbound window at 0x14_000000-0x17_ffffff
|
|
+ pcie0: pcie@100000 {
|
|
+ compatible = "brcm,bcm2712-pcie";
|
|
+ reg = <0x10 0x00100000 0x0 0x9310>;
|
|
+ device_type = "pci";
|
|
+ max-link-speed = <2>;
|
|
+ #address-cells = <3>;
|
|
+ #interrupt-cells = <1>;
|
|
+ #size-cells = <2>;
|
|
+ /*
|
|
+ * Unused interrupts:
|
|
+ * 208: AER
|
|
+ * 215: NMI
|
|
+ * 216: PME
|
|
+ */
|
|
+ interrupt-parent = <&gicv2>;
|
|
+ interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "pcie", "msi";
|
|
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 2 &gicv2 GIC_SPI 210
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 3 &gicv2 GIC_SPI 211
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 4 &gicv2 GIC_SPI 212
|
|
+ IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>;
|
|
+ reset-names = "swinit", "bridge", "rescal";
|
|
+ msi-controller;
|
|
+ msi-parent = <&pcie0>;
|
|
+
|
|
+ ranges = <0x02000000 0x00 0x00000000
|
|
+ 0x17 0x00000000
|
|
+ 0x0 0xfffffffc>,
|
|
+ <0x43000000 0x04 0x00000000
|
|
+ 0x14 0x00000000
|
|
+ 0x3 0x00000000>;
|
|
+
|
|
+ dma-ranges = <0x43000000 0x10 0x00000000
|
|
+ 0x00 0x00000000
|
|
+ 0x10 0x00000000>;
|
|
+
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ // Single-lane Gen3 PCIe
|
|
+ // Outbound window at 0x18_000000-0x1b_ffffff
|
|
+ pcie1: pcie@110000 {
|
|
+ compatible = "brcm,bcm2712-pcie";
|
|
+ reg = <0x10 0x00110000 0x0 0x9310>;
|
|
+ device_type = "pci";
|
|
+ max-link-speed = <2>;
|
|
+ #address-cells = <3>;
|
|
+ #interrupt-cells = <1>;
|
|
+ #size-cells = <2>;
|
|
+ /*
|
|
+ * Unused interrupts:
|
|
+ * 218: AER
|
|
+ * 225: NMI
|
|
+ * 226: PME
|
|
+ */
|
|
+ interrupt-parent = <&gicv2>;
|
|
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "pcie", "msi";
|
|
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 2 &gicv2 GIC_SPI 220
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 3 &gicv2 GIC_SPI 221
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 4 &gicv2 GIC_SPI 222
|
|
+ IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>;
|
|
+ reset-names = "swinit", "bridge", "rescal";
|
|
+ msi-controller;
|
|
+ msi-parent = <&mip1>;
|
|
+
|
|
+ ranges = <0x02000000 0x00 0x00000000
|
|
+ 0x1b 0x00000000
|
|
+ 0x00 0xfffffffc>,
|
|
+ <0x43000000 0x04 0x00000000
|
|
+ 0x18 0x00000000
|
|
+ 0x03 0x00000000>;
|
|
+
|
|
+ dma-ranges = <0x03000000 0x10 0x00000000
|
|
+ 0x00 0x00000000
|
|
+ 0x10 0x00000000>;
|
|
+
|
|
+ brcm,enable-l1ss;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pcie_rescal: reset-controller@119500 {
|
|
+ compatible = "brcm,bcm7216-pcie-sata-rescal";
|
|
+ reg = <0x10 0x00119500 0x0 0x10>;
|
|
+ #reset-cells = <0>;
|
|
+ };
|
|
+
|
|
+ // Quad-lane Gen3 PCIe
|
|
+ // Outbound window at 0x1c_000000-0x1f_ffffff
|
|
+ pcie2: pcie@120000 {
|
|
+ compatible = "brcm,bcm2712-pcie";
|
|
+ reg = <0x10 0x00120000 0x0 0x9310>;
|
|
+ device_type = "pci";
|
|
+ max-link-speed = <2>;
|
|
+ #address-cells = <3>;
|
|
+ #interrupt-cells = <1>;
|
|
+ #size-cells = <2>;
|
|
+ /*
|
|
+ * Unused interrupts:
|
|
+ * 228: AER
|
|
+ * 235: NMI
|
|
+ * 236: PME
|
|
+ */
|
|
+ interrupt-parent = <&gicv2>;
|
|
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "pcie", "msi";
|
|
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 2 &gicv2 GIC_SPI 230
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 3 &gicv2 GIC_SPI 231
|
|
+ IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <0 0 0 4 &gicv2 GIC_SPI 232
|
|
+ IRQ_TYPE_LEVEL_HIGH>;
|
|
+ resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>;
|
|
+ reset-names = "swinit", "bridge", "rescal";
|
|
+ msi-controller;
|
|
+ msi-parent = <&mip0>;
|
|
+
|
|
+ // ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000
|
|
+ ranges = <0x02000000 0x00 0x00000000
|
|
+ 0x1f 0x00000000
|
|
+ 0x0 0xfffffffc>,
|
|
+ // 12GB, 64-bit, prefetchable at PCIe 04_00000000
|
|
+ <0x43000000 0x04 0x00000000
|
|
+ 0x1c 0x00000000
|
|
+ 0x03 0x00000000>;
|
|
+
|
|
+ // 64GB system RAM space at PCIe 10_00000000
|
|
+ dma-ranges = <0x02000000 0x00 0x00000000
|
|
+ 0x1f 0x00000000
|
|
+ 0x00 0x00400000>,
|
|
+ <0x43000000 0x10 0x00000000
|
|
+ 0x00 0x00000000
|
|
+ 0x10 0x00000000>;
|
|
+
|
|
+ brcm,enable-l1ss;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ mip0: msi-controller@130000 {
|
|
+ compatible = "brcm,bcm2712-mip-intc";
|
|
+ reg = <0x10 0x00130000 0x0 0xc0>;
|
|
+ msi-controller;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+ brcm,msi-base-spi = <128>;
|
|
+ brcm,msi-num-spis = <64>;
|
|
+ brcm,msi-offset = <0>;
|
|
+ brcm,msi-pci-addr = <0xff 0xfffff000>;
|
|
+ };
|
|
+
|
|
+ mip1: msi-controller@131000 {
|
|
+ compatible = "brcm,bcm2712-mip-intc";
|
|
+ reg = <0x10 0x00131000 0x0 0xc0>;
|
|
+ msi-controller;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+ brcm,msi-base-spi = <247>;
|
|
+ /* Actually 20 total, but the others are
|
|
+ * both sparse and non-consecutive */
|
|
+ brcm,msi-num-spis = <8>;
|
|
+ brcm,msi-offset = <8>;
|
|
+ brcm,msi-pci-addr = <0xff 0xffffe000>;
|
|
+ };
|
|
+
|
|
+ genet: ethernet@1300000 {
|
|
+ compatible = "brcm,bcm2711-genet-v5";
|
|
+ reg = <0x10 0x01300000 0x0 0x20010>;
|
|
+ #address-cells = <0x1>;
|
|
+ #size-cells = <0x0>;
|
|
+ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ status = "disabled";
|
|
+ phy-mode = "rgmii";
|
|
+ fixed-link = <0x0 0x1 0x3e8 0x0 0x0>;
|
|
+ phy-speed = <0x3e8>;
|
|
+ phy-id = <0x101>;
|
|
+ phy-type = <0x6>;
|
|
+ local-mac-address = [ 00 10 18 d8 45 de ];
|
|
+ device_type = "network";
|
|
+
|
|
+ genet_mdio: mdio@e14 {
|
|
+ compatible = "brcm,genet-mdio-v5";
|
|
+ reg = <0xe14 0x8>;
|
|
+ #address-cells = <0x1>;
|
|
+ #size-cells = <0x0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ syscon_piarbctl: syscon@400018 {
|
|
+ compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd";
|
|
+ reg = <0x10 0x00400018 0x0 0x18>;
|
|
+ };
|
|
+
|
|
+ rpivid: codec@800000 {
|
|
+ compatible = "raspberrypi,rpivid-vid-decoder";
|
|
+ reg = <0x10 0x00800000 0x0 0x10000>, /* HEVC */
|
|
+ <0x10 0x00840000 0x0 0x1000>; /* INTC */
|
|
+ reg-names = "hevc",
|
|
+ "intc";
|
|
+
|
|
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&firmware_clocks 11>;
|
|
+ clock-names = "hevc";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sdio1: mmc@fff000 {
|
|
+ compatible = "brcm,bcm2712-sdhci";
|
|
+ reg = <0x10 0x00fff000 0x0 0x260>,
|
|
+ <0x10 0x00fff400 0x0 0x200>,
|
|
+ <0x10 0x015040b0 0x0 0x4>, // Bus isolation control
|
|
+ <0x10 0x015200f0 0x0 0x24>; // LCPLL control misc0-8
|
|
+ reg-names = "host", "cfg", "busisol", "lcpll";
|
|
+ interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_emmc2>;
|
|
+ sdhci-caps-mask = <0x0000C000 0x0>;
|
|
+ sdhci-caps = <0x0 0x0>;
|
|
+ supports-cqe;
|
|
+ mmc-ddr-3_3v;
|
|
+ };
|
|
+
|
|
+ sdio2: mmc@1100000 {
|
|
+ compatible = "brcm,bcm2712-sdhci";
|
|
+ reg = <0x10 0x01100000 0x0 0x260>,
|
|
+ <0x10 0x01100400 0x0 0x200>;
|
|
+ reg-names = "host", "cfg";
|
|
+ interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_emmc2>;
|
|
+ sdhci-caps-mask = <0x0000C000 0x0>;
|
|
+ sdhci-caps = <0x0 0x0>;
|
|
+ supports-cqe;
|
|
+ mmc-ddr-3_3v;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ sdio0: mmc@1108000 {
|
|
+ compatible = "brcm,bcm2711-emmc2";
|
|
+ reg = <0x10 0x01108000 0x0 0x100>;
|
|
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clk_emmc2>;
|
|
+ mmc-ddr-3_3v;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ bcm_reset: reset-controller@1504318 {
|
|
+ compatible = "brcm,brcmstb-reset";
|
|
+ reg = <0x10 0x01504318 0x0 0x30>;
|
|
+ #reset-cells = <1>;
|
|
+ };
|
|
+
|
|
+ v3d: v3d@2000000 {
|
|
+ compatible = "brcm,2712-v3d";
|
|
+ reg = <0x10 0x02000000 0x0 0x4000>,
|
|
+ <0x10 0x02008000 0x0 0x6000>;
|
|
+ reg-names = "hub", "core0";
|
|
+
|
|
+ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
|
|
+ resets = <&pm BCM2835_RESET_V3D>;
|
|
+ clocks = <&firmware_clocks 5>;
|
|
+ clocks-names = "v3d";
|
|
+ interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ gicv2: interrupt-controller@7fff9000 {
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <3>;
|
|
+ compatible = "arm,gic-400";
|
|
+ reg = <0x10 0x7fff9000 0x0 0x1000>,
|
|
+ <0x10 0x7fffa000 0x0 0x2000>,
|
|
+ <0x10 0x7fffc000 0x0 0x2000>,
|
|
+ <0x10 0x7fffe000 0x0 0x2000>;
|
|
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_HIGH)>;
|
|
+ };
|
|
+
|
|
+ pisp_be: pisp_be@880000 {
|
|
+ compatible = "raspberrypi,pispbe";
|
|
+ reg = <0x10 0x00880000 0x0 0x4000>;
|
|
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&firmware_clocks 7>;
|
|
+ clocks-names = "isp_be";
|
|
+ status = "okay";
|
|
+ iommus = <&iommu2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ clocks {
|
|
+ /* The oscillator is the root of the clock tree. */
|
|
+ clk_osc: clk-osc {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "osc";
|
|
+ clock-frequency = <54000000>;
|
|
+ };
|
|
+
|
|
+ clk_usb: clk-usb {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "otg";
|
|
+ clock-frequency = <480000000>;
|
|
+ };
|
|
+
|
|
+ clk_vpu: clk_vpu {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <750000000>;
|
|
+ clock-output-names = "vpu-clock";
|
|
+ };
|
|
+
|
|
+ clk_uart: clk_uart {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <9216000>;
|
|
+ clock-output-names = "uart-clock";
|
|
+ };
|
|
+
|
|
+ clk_emmc2: clk_emmc2 {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <54000000>;
|
|
+ clock-output-names = "emmc2-clock";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usbphy: phy {
|
|
+ compatible = "usb-nop-xceiv";
|
|
+ #phy-cells = <0>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/broadcom/rp1.dtsi
|
|
@@ -0,0 +1,1168 @@
|
|
+#include <dt-bindings/clock/rp1.h>
|
|
+#include <dt-bindings/interrupt-controller/irq.h>
|
|
+#include <dt-bindings/mfd/rp1.h>
|
|
+
|
|
+&rp1_target {
|
|
+ rp1: rp1 {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupt-controller;
|
|
+ interrupt-parent = <&rp1>;
|
|
+
|
|
+ // ranges and dma-ranges must be provided by the includer
|
|
+
|
|
+ rp1_clocks: clocks@18000 {
|
|
+ compatible = "raspberrypi,rp1-clocks";
|
|
+ #clock-cells = <1>;
|
|
+ reg = <0xc0 0x40018000 0x0 0x10038>;
|
|
+ clocks = <&clk_xosc>;
|
|
+
|
|
+ assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>,
|
|
+ <&rp1_clocks RP1_PLL_AUDIO_CORE>,
|
|
+ // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers
|
|
+ <&rp1_clocks RP1_PLL_SYS>,
|
|
+ <&rp1_clocks RP1_PLL_SYS_SEC>,
|
|
+ <&rp1_clocks RP1_PLL_AUDIO>,
|
|
+ <&rp1_clocks RP1_PLL_AUDIO_SEC>,
|
|
+ <&rp1_clocks RP1_CLK_SYS>,
|
|
+ <&rp1_clocks RP1_PLL_SYS_PRI_PH>,
|
|
+ // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0)
|
|
+ <&rp1_clocks RP1_CLK_SLOW_SYS>,
|
|
+ <&rp1_clocks RP1_CLK_SDIO_TIMER>,
|
|
+ <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>,
|
|
+ <&rp1_clocks RP1_CLK_ETH_TSU>;
|
|
+
|
|
+ assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
|
|
+ <1536000000>, // RP1_PLL_AUDIO_CORE
|
|
+ <200000000>, // RP1_PLL_SYS
|
|
+ <125000000>, // RP1_PLL_SYS_SEC
|
|
+ <61440000>, // RP1_PLL_AUDIO
|
|
+ <192000000>, // RP1_PLL_AUDIO_SEC
|
|
+ <200000000>, // RP1_CLK_SYS
|
|
+ <100000000>, // RP1_PLL_SYS_PRI_PH
|
|
+ // Must match the XOSC frequency
|
|
+ <50000000>, // RP1_CLK_SLOW_SYS
|
|
+ <1000000>, // RP1_CLK_SDIO_TIMER
|
|
+ <200000000>, // RP1_CLK_SDIO_ALT_SRC
|
|
+ <50000000>; // RP1_CLK_ETH_TSU
|
|
+ };
|
|
+
|
|
+ rp1_uart0: serial@30000 {
|
|
+ compatible = "arm,pl011-axi";
|
|
+ reg = <0xc0 0x40030000 0x0 0x100>;
|
|
+ interrupts = <RP1_INT_UART0 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ dmas = <&rp1_dma RP1_DMA_UART0_TX>,
|
|
+ <&rp1_dma RP1_DMA_UART0_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ pinctrl-names = "default";
|
|
+ arm,primecell-periphid = <0x00541011>;
|
|
+ uart-has-rtscts;
|
|
+ cts-event-workaround;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_uart1: serial@34000 {
|
|
+ compatible = "arm,pl011-axi";
|
|
+ reg = <0xc0 0x40034000 0x0 0x100>;
|
|
+ interrupts = <RP1_INT_UART1 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ // dmas = <&rp1_dma RP1_DMA_UART1_TX>,
|
|
+ // <&rp1_dma RP1_DMA_UART1_RX>;
|
|
+ // dma-names = "tx", "rx";
|
|
+ pinctrl-names = "default";
|
|
+ arm,primecell-periphid = <0x00541011>;
|
|
+ uart-has-rtscts;
|
|
+ cts-event-workaround;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_uart2: serial@38000 {
|
|
+ compatible = "arm,pl011-axi";
|
|
+ reg = <0xc0 0x40038000 0x0 0x100>;
|
|
+ interrupts = <RP1_INT_UART2 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ // dmas = <&rp1_dma RP1_DMA_UART2_TX>,
|
|
+ // <&rp1_dma RP1_DMA_UART2_RX>;
|
|
+ // dma-names = "tx", "rx";
|
|
+ pinctrl-names = "default";
|
|
+ arm,primecell-periphid = <0x00541011>;
|
|
+ uart-has-rtscts;
|
|
+ cts-event-workaround;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_uart3: serial@3c000 {
|
|
+ compatible = "arm,pl011-axi";
|
|
+ reg = <0xc0 0x4003c000 0x0 0x100>;
|
|
+ interrupts = <RP1_INT_UART3 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ // dmas = <&rp1_dma RP1_DMA_UART3_TX>,
|
|
+ // <&rp1_dma RP1_DMA_UART3_RX>;
|
|
+ // dma-names = "tx", "rx";
|
|
+ pinctrl-names = "default";
|
|
+ arm,primecell-periphid = <0x00541011>;
|
|
+ uart-has-rtscts;
|
|
+ cts-event-workaround;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_uart4: serial@40000 {
|
|
+ compatible = "arm,pl011-axi";
|
|
+ reg = <0xc0 0x40040000 0x0 0x100>;
|
|
+ interrupts = <RP1_INT_UART4 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ // dmas = <&rp1_dma RP1_DMA_UART4_TX>,
|
|
+ // <&rp1_dma RP1_DMA_UART4_RX>;
|
|
+ // dma-names = "tx", "rx";
|
|
+ pinctrl-names = "default";
|
|
+ arm,primecell-periphid = <0x00541011>;
|
|
+ uart-has-rtscts;
|
|
+ cts-event-workaround;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_uart5: serial@44000 {
|
|
+ compatible = "arm,pl011-axi";
|
|
+ reg = <0xc0 0x40044000 0x0 0x100>;
|
|
+ interrupts = <RP1_INT_UART5 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ // dmas = <&rp1_dma RP1_DMA_UART5_TX>,
|
|
+ // <&rp1_dma RP1_DMA_UART5_RX>;
|
|
+ // dma-names = "tx", "rx";
|
|
+ pinctrl-names = "default";
|
|
+ arm,primecell-periphid = <0x00541011>;
|
|
+ uart-has-rtscts;
|
|
+ cts-event-workaround;
|
|
+ skip-init;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_spi8: spi@4c000 {
|
|
+ reg = <0xc0 0x4004c000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI8 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <2>;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI8_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI8_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_spi0: spi@50000 {
|
|
+ reg = <0xc0 0x40050000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI0 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <2>;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI0_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI0_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_spi1: spi@54000 {
|
|
+ reg = <0xc0 0x40054000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI1 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <0>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <2>;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI1_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI1_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_spi2: spi@58000 {
|
|
+ reg = <0xc0 0x40058000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI2 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <2>;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI2_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI2_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_spi3: spi@5c000 {
|
|
+ reg = <0xc0 0x4005c000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI3 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <2>;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI3_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI3_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ // SPI4 is a target/slave interface
|
|
+ rp1_spi4: spi@60000 {
|
|
+ reg = <0xc0 0x40060000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI4 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <0>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <1>;
|
|
+ spi-slave;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI4_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI4_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+
|
|
+ slave {
|
|
+ compatible = "spidev";
|
|
+ spi-max-frequency = <1000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rp1_spi5: spi@64000 {
|
|
+ reg = <0xc0 0x40064000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI5 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <2>;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI5_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI5_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ // SPI7 is a target/slave interface
|
|
+ rp1_spi7: spi@6c000 {
|
|
+ reg = <0xc0 0x4006c000 0x0 0x130>;
|
|
+ compatible = "snps,dw-apb-ssi";
|
|
+ interrupts = <RP1_INT_SPI7 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "ssi_clk";
|
|
+ #address-cells = <0>;
|
|
+ #size-cells = <0>;
|
|
+ num-cs = <1>;
|
|
+ spi-slave;
|
|
+ dmas = <&rp1_dma RP1_DMA_SPI7_TX>,
|
|
+ <&rp1_dma RP1_DMA_SPI7_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+
|
|
+ slave {
|
|
+ compatible = "spidev";
|
|
+ spi-max-frequency = <1000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rp1_i2c0: i2c@70000 {
|
|
+ reg = <0xc0 0x40070000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2c";
|
|
+ interrupts = <RP1_INT_I2C0 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2c1: i2c@74000 {
|
|
+ reg = <0xc0 0x40074000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2c";
|
|
+ interrupts = <RP1_INT_I2C1 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2c2: i2c@78000 {
|
|
+ reg = <0xc0 0x40078000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2c";
|
|
+ interrupts = <RP1_INT_I2C2 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2c3: i2c@7c000 {
|
|
+ reg = <0xc0 0x4007c000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2c";
|
|
+ interrupts = <RP1_INT_I2C3 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2c4: i2c@80000 {
|
|
+ reg = <0xc0 0x40080000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2c";
|
|
+ interrupts = <RP1_INT_I2C4 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2c5: i2c@84000 {
|
|
+ reg = <0xc0 0x40084000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2c";
|
|
+ interrupts = <RP1_INT_I2C5 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2c6: i2c@88000 {
|
|
+ reg = <0xc0 0x40088000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2c";
|
|
+ interrupts = <RP1_INT_I2C6 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_pwm0: pwm@98000 {
|
|
+ compatible = "raspberrypi,rp1-pwm";
|
|
+ reg = <0xc0 0x40098000 0x0 0x100>;
|
|
+ #pwm-cells = <3>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_PWM0>;
|
|
+ assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>;
|
|
+ assigned-clock-rates = <6144000>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_pwm1: pwm@9c000 {
|
|
+ compatible = "raspberrypi,rp1-pwm";
|
|
+ reg = <0xc0 0x4009c000 0x0 0x100>;
|
|
+ #pwm-cells = <3>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_PWM1>;
|
|
+ assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>;
|
|
+ assigned-clock-rates = <6144000>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2s0: i2s@a0000 {
|
|
+ reg = <0xc0 0x400a0000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2s";
|
|
+ // Providing an interrupt disables DMA
|
|
+ // interrupts = <RP1_INT_I2S0 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_I2S>;
|
|
+ clock-names = "i2sclk";
|
|
+ #sound-dai-cells = <0>;
|
|
+ dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2s1: i2s@a4000 {
|
|
+ reg = <0xc0 0x400a4000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2s";
|
|
+ // Providing an interrupt disables DMA
|
|
+ // interrupts = <RP1_INT_I2S1 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_I2S>;
|
|
+ clock-names = "i2sclk";
|
|
+ #sound-dai-cells = <0>;
|
|
+ dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_i2s2: i2s@a8000 {
|
|
+ reg = <0xc0 0x400a8000 0x0 0x1000>;
|
|
+ compatible = "snps,designware-i2s";
|
|
+ // Providing an interrupt disables DMA
|
|
+ // interrupts = <RP1_INT_I2S2 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_I2S>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_sdio_clk0: sdio_clk0@b0004 {
|
|
+ compatible = "raspberrypi,rp1-sdio-clk";
|
|
+ reg = <0xc0 0x400b0004 0x0 0x1c>;
|
|
+ clocks = <&sdio_src &sdhci_core>;
|
|
+ clock-names = "src", "base";
|
|
+ #clock-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_sdio_clk1: sdio_clk1@b4004 {
|
|
+ compatible = "raspberrypi,rp1-sdio-clk";
|
|
+ reg = <0xc0 0x400b4004 0x0 0x1c>;
|
|
+ clocks = <&sdio_src &sdhci_core>;
|
|
+ clock-names = "src", "base";
|
|
+ #clock-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_adc: adc@c8000 {
|
|
+ compatible = "raspberrypi,rp1-adc";
|
|
+ reg = <0xc0 0x400c8000 0x0 0x4000>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_ADC>;
|
|
+ clock-names = "adcclk";
|
|
+ #clock-cells = <0>;
|
|
+ vref-supply = <&rp1_vdd_3v3>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_gpio: gpio@d0000 {
|
|
+ reg = <0xc0 0x400d0000 0x0 0xc000>,
|
|
+ <0xc0 0x400e0000 0x0 0xc000>,
|
|
+ <0xc0 0x400f0000 0x0 0xc000>;
|
|
+ compatible = "raspberrypi,rp1-gpio";
|
|
+ interrupts = <RP1_INT_IO_BANK0 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <RP1_INT_IO_BANK1 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <RP1_INT_IO_BANK2 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+
|
|
+ rp1_uart0_14_15: rp1_uart0_14_15 {
|
|
+ pin_txd {
|
|
+ function = "uart0";
|
|
+ pins = "gpio14";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_rxd {
|
|
+ function = "uart0";
|
|
+ pins = "gpio15";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 {
|
|
+ pin_cts {
|
|
+ function = "uart0";
|
|
+ pins = "gpio16";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin_rts {
|
|
+ function = "uart0";
|
|
+ pins = "gpio17";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart1_0_1: rp1_uart1_0_1 {
|
|
+ pin_txd {
|
|
+ function = "uart1";
|
|
+ pins = "gpio0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_rxd {
|
|
+ function = "uart1";
|
|
+ pins = "gpio1";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 {
|
|
+ pin_cts {
|
|
+ function = "uart1";
|
|
+ pins = "gpio2";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin_rts {
|
|
+ function = "uart1";
|
|
+ pins = "gpio3";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart2_4_5: rp1_uart2_4_5 {
|
|
+ pin_txd {
|
|
+ function = "uart2";
|
|
+ pins = "gpio4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_rxd {
|
|
+ function = "uart2";
|
|
+ pins = "gpio5";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 {
|
|
+ pin_cts {
|
|
+ function = "uart2";
|
|
+ pins = "gpio6";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin_rts {
|
|
+ function = "uart2";
|
|
+ pins = "gpio7";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart3_8_9: rp1_uart3_8_9 {
|
|
+ pin_txd {
|
|
+ function = "uart3";
|
|
+ pins = "gpio8";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_rxd {
|
|
+ function = "uart3";
|
|
+ pins = "gpio9";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 {
|
|
+ pin_cts {
|
|
+ function = "uart3";
|
|
+ pins = "gpio10";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin_rts {
|
|
+ function = "uart3";
|
|
+ pins = "gpio11";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart4_12_13: rp1_uart4_12_13 {
|
|
+ pin_txd {
|
|
+ function = "uart4";
|
|
+ pins = "gpio12";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin_rxd {
|
|
+ function = "uart4";
|
|
+ pins = "gpio13";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 {
|
|
+ pin_cts {
|
|
+ function = "uart4";
|
|
+ pins = "gpio14";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin_rts {
|
|
+ function = "uart4";
|
|
+ pins = "gpio15";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rp1_sdio0_22_27: rp1_sdio0_22_27 {
|
|
+ pin_clk {
|
|
+ function = "sd0";
|
|
+ pins = "gpio22";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+ pin_cmd {
|
|
+ function = "sd0";
|
|
+ pins = "gpio23";
|
|
+ bias-pull-up;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+ pins_dat {
|
|
+ function = "sd0";
|
|
+ pins = "gpio24", "gpio25", "gpio26", "gpio27";
|
|
+ bias-pull-up;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rp1_sdio1_28_33: rp1_sdio1_28_33 {
|
|
+ pin_clk {
|
|
+ function = "sd1";
|
|
+ pins = "gpio28";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+ pin_cmd {
|
|
+ function = "sd1";
|
|
+ pins = "gpio29";
|
|
+ bias-pull-up;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+ pins_dat {
|
|
+ function = "sd1";
|
|
+ pins = "gpio30", "gpio31", "gpio32", "gpio33";
|
|
+ bias-pull-up;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rp1_i2s0_18_21: rp1_i2s0_18_21 {
|
|
+ function = "i2s0";
|
|
+ pins = "gpio18", "gpio19", "gpio20", "gpio21";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ rp1_i2s1_18_21: rp1_i2s1_18_21 {
|
|
+ function = "i2s1";
|
|
+ pins = "gpio18", "gpio19", "gpio20", "gpio21";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ rp1_i2c4_34_35: rp1_i2c4_34_35 {
|
|
+ function = "i2c4";
|
|
+ pins = "gpio34", "gpio35";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c6_38_39: rp1_i2c6_38_39 {
|
|
+ function = "i2c6";
|
|
+ pins = "gpio38", "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c4_40_41: rp1_i2c4_40_41 {
|
|
+ function = "i2c4";
|
|
+ pins = "gpio40", "gpio41";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c5_44_45: rp1_i2c5_44_45 {
|
|
+ function = "i2c5";
|
|
+ pins = "gpio44", "gpio45";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c0_0_1: rp1_i2c0_0_1 {
|
|
+ function = "i2c0";
|
|
+ pins = "gpio0", "gpio1";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c0_8_9: rp1_i2c0_8_9 {
|
|
+ function = "i2c0";
|
|
+ pins = "gpio8", "gpio9";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c1_2_3: rp1_i2c1_2_3 {
|
|
+ function = "i2c1";
|
|
+ pins = "gpio2", "gpio3";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c1_10_11: rp1_i2c1_10_11 {
|
|
+ function = "i2c1";
|
|
+ pins = "gpio10", "gpio11";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c2_4_5: rp1_i2c2_4_5 {
|
|
+ function = "i2c2";
|
|
+ pins = "gpio4", "gpio5";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c2_12_13: rp1_i2c2_12_13 {
|
|
+ function = "i2c2";
|
|
+ pins = "gpio12", "gpio13";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c3_6_7: rp1_i2c3_6_7 {
|
|
+ function = "i2c3";
|
|
+ pins = "gpio6", "gpio7";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c3_14_15: rp1_i2c3_14_15 {
|
|
+ function = "i2c3";
|
|
+ pins = "gpio14", "gpio15";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ rp1_i2c3_22_23: rp1_i2c3_22_23 {
|
|
+ function = "i2c3";
|
|
+ pins = "gpio22", "gpio23";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ // DPI mappings with HSYNC,VSYNC but without PIXCLK,DE
|
|
+ rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
|
|
+ "gpio6", "gpio7", "gpio8", "gpio9",
|
|
+ "gpio10", "gpio11", "gpio12", "gpio13",
|
|
+ "gpio14", "gpio15", "gpio16", "gpio17",
|
|
+ "gpio18", "gpio19";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
|
|
+ "gpio6", "gpio7", "gpio8",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17",
|
|
+ "gpio20", "gpio21", "gpio22", "gpio23",
|
|
+ "gpio24";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio2", "gpio3",
|
|
+ "gpio5", "gpio6", "gpio7", "gpio8",
|
|
+ "gpio9",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17",
|
|
+ "gpio21", "gpio22", "gpio23", "gpio24",
|
|
+ "gpio25";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
|
|
+ "gpio6", "gpio7", "gpio8", "gpio9",
|
|
+ "gpio10", "gpio11", "gpio12", "gpio13",
|
|
+ "gpio14", "gpio15", "gpio16", "gpio17",
|
|
+ "gpio18", "gpio19", "gpio20", "gpio21";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
|
|
+ "gpio6", "gpio7", "gpio8", "gpio9",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17",
|
|
+ "gpio20", "gpio21", "gpio22", "gpio23",
|
|
+ "gpio24", "gpio25";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio2", "gpio3", "gpio4", "gpio5",
|
|
+ "gpio6", "gpio7", "gpio8", "gpio9",
|
|
+ "gpio10", "gpio11", "gpio12", "gpio13",
|
|
+ "gpio14", "gpio15", "gpio16", "gpio17",
|
|
+ "gpio18", "gpio19", "gpio20", "gpio21",
|
|
+ "gpio22", "gpio23", "gpio24", "gpio25",
|
|
+ "gpio26", "gpio27";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */
|
|
+ function = "dpi";
|
|
+ pins = "gpio2", "gpio3";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ // More DPI mappings, including PIXCLK,DE on GPIOs 0,1
|
|
+ rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
|
|
+ "gpio4", "gpio5", "gpio6", "gpio7",
|
|
+ "gpio8", "gpio9", "gpio10", "gpio11",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17", "gpio18", "gpio19";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
|
|
+ "gpio4", "gpio5", "gpio6", "gpio7",
|
|
+ "gpio8",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17",
|
|
+ "gpio20", "gpio21", "gpio22", "gpio23",
|
|
+ "gpio24";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
|
|
+ "gpio5", "gpio6", "gpio7", "gpio8",
|
|
+ "gpio9",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17",
|
|
+ "gpio21", "gpio22", "gpio23", "gpio24",
|
|
+ "gpio25";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
|
|
+ "gpio4", "gpio5", "gpio6", "gpio7",
|
|
+ "gpio8", "gpio9", "gpio10", "gpio11",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17", "gpio18", "gpio19",
|
|
+ "gpio20", "gpio21";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */
|
|
+ function = "dpi";
|
|
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
|
|
+ "gpio4", "gpio5", "gpio6", "gpio7",
|
|
+ "gpio8", "gpio9",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17",
|
|
+ "gpio20", "gpio21", "gpio22", "gpio23",
|
|
+ "gpio24", "gpio25";
|
|
+ bias-disable;
|
|
+ };
|
|
+ rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */
|
|
+ function = "dpi";
|
|
+ pins = "gpio0", "gpio1", "gpio2", "gpio3",
|
|
+ "gpio4", "gpio5", "gpio6", "gpio7",
|
|
+ "gpio8", "gpio9", "gpio10", "gpio11",
|
|
+ "gpio12", "gpio13", "gpio14", "gpio15",
|
|
+ "gpio16", "gpio17", "gpio18", "gpio19",
|
|
+ "gpio20", "gpio21", "gpio22", "gpio23",
|
|
+ "gpio24", "gpio25", "gpio26", "gpio27";
|
|
+ bias-disable;
|
|
+ };
|
|
+
|
|
+ rp1_pwm1_gpio45: rp1_pwm1_gpio45 {
|
|
+ function = "pwm1";
|
|
+ pins = "gpio45";
|
|
+ bias-pull-down;
|
|
+ };
|
|
+
|
|
+ rp1_spi0_gpio9: rp1_spi0_gpio9 {
|
|
+ function = "spi0";
|
|
+ pins = "gpio9", "gpio10", "gpio11";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 {
|
|
+ function = "spi0";
|
|
+ pins = "gpio7", "gpio8";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ rp1_spi1_gpio19: rp1_spi1_gpio19 {
|
|
+ function = "spi1";
|
|
+ pins = "gpio19", "gpio20", "gpio21";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ rp1_spi2_gpio1: rp1_spi2_gpio1 {
|
|
+ function = "spi2";
|
|
+ pins = "gpio1", "gpio2", "gpio3";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ rp1_spi3_gpio5: rp1_spi3_gpio5 {
|
|
+ function = "spi3";
|
|
+ pins = "gpio5", "gpio6", "gpio7";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ rp1_spi4_gpio9: rp1_spi4_gpio9 {
|
|
+ function = "spi4";
|
|
+ pins = "gpio9", "gpio10", "gpio11";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ rp1_spi5_gpio13: rp1_spi5_gpio13 {
|
|
+ function = "spi5";
|
|
+ pins = "gpio13", "gpio14", "gpio15";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ rp1_spi8_gpio49: rp1_spi8_gpio49 {
|
|
+ function = "spi8";
|
|
+ pins = "gpio49", "gpio50", "gpio51";
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ slew-rate = <1>;
|
|
+ };
|
|
+
|
|
+ rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 {
|
|
+ function = "spi0";
|
|
+ pins = "gpio52", "gpio53";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rp1_eth: ethernet@100000 {
|
|
+ reg = <0xc0 0x40100000 0x0 0x4000>;
|
|
+ compatible = "cdns,macb";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ interrupts = <RP1_INT_ETH IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&macb_pclk &macb_hclk &rp1_clocks RP1_CLK_ETH_TSU>;
|
|
+ clock-names = "pclk", "hclk", "tsu_clk";
|
|
+ phy-mode = "rgmii-id";
|
|
+ cdns,aw2w-max-pipe = /bits/ 8 <8>;
|
|
+ cdns,ar2r-max-pipe = /bits/ 8 <8>;
|
|
+ cdns,use-aw2b-fill;
|
|
+ local-mac-address = [00 00 00 00 00 00];
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_csi0: csi@110000 {
|
|
+ compatible = "raspberrypi,rp1-cfe";
|
|
+ reg = <0xc0 0x40110000 0x0 0x100>, // CSI2 DMA address
|
|
+ <0xc0 0x40114000 0x0 0x100>, // PHY/CSI Host address
|
|
+ <0xc0 0x40120000 0x0 0x100>, // MIPI CFG address
|
|
+ <0xc0 0x40124000 0x0 0x1000>; // PiSP FE address
|
|
+
|
|
+ // interrupts must match rp1_pisp_fe setup
|
|
+ interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
|
|
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_csi1: csi@128000 {
|
|
+ compatible = "raspberrypi,rp1-cfe";
|
|
+ reg = <0xc0 0x40128000 0x0 0x100>, // CSI2 DMA address
|
|
+ <0xc0 0x4012c000 0x0 0x100>, // PHY/CSI Host address
|
|
+ <0xc0 0x40138000 0x0 0x100>, // MIPI CFG address
|
|
+ <0xc0 0x4013c000 0x0 0x1000>; // PiSP FE address
|
|
+
|
|
+ // interrupts must match rp1_pisp_fe setup
|
|
+ interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
|
|
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_mmc0: mmc@180000 {
|
|
+ reg = <0xc0 0x40180000 0x0 0x100>;
|
|
+ compatible = "snps,dwcmshc-sdhci";
|
|
+ interrupts = <RP1_INT_SDIO0 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
|
|
+ &rp1_clocks RP1_CLK_SDIO_TIMER
|
|
+ &rp1_sdio_clk0>;
|
|
+ clock-names = "bus", "core", "timeout", "sdio";
|
|
+ /* Bank 0 VDDIO is fixed */
|
|
+ no-1-8-v;
|
|
+ bus-width = <4>;
|
|
+ vmmc-supply = <&rp1_vdd_3v3>;
|
|
+ broken-cd;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_mmc1: mmc@184000 {
|
|
+ reg = <0xc0 0x40184000 0x0 0x100>;
|
|
+ compatible = "snps,dwcmshc-sdhci";
|
|
+ interrupts = <RP1_INT_SDIO1 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core
|
|
+ &rp1_clocks RP1_CLK_SDIO_TIMER
|
|
+ &rp1_sdio_clk1>;
|
|
+ clock-names = "bus", "core", "timeout", "sdio";
|
|
+ bus-width = <4>;
|
|
+ vmmc-supply = <&rp1_vdd_3v3>;
|
|
+ /* Nerf SDR speeds */
|
|
+ sdhci-caps-mask = <0x3 0x0>;
|
|
+ broken-cd;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_dma: dma@188000 {
|
|
+ reg = <0xc0 0x40188000 0x0 0x1000>;
|
|
+ compatible = "snps,axi-dma-1.01a";
|
|
+ interrupts = <RP1_INT_DMA IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&sdhci_core &rp1_clocks RP1_CLK_SYS>;
|
|
+ clock-names = "core-clk", "cfgr-clk";
|
|
+
|
|
+ #dma-cells = <1>;
|
|
+ dma-channels = <8>;
|
|
+ snps,dma-masters = <1>;
|
|
+ snps,dma-targets = <64>;
|
|
+ snps,data-width = <4>; // (8 << 4) == 128 bits
|
|
+ snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
|
|
+ snps,priority = <0 1 2 3 4 5 6 7>;
|
|
+ snps,axi-max-burst-len = <8>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_usb0: usb@200000 {
|
|
+ reg = <0xc0 0x40200000 0x0 0x100000>;
|
|
+ compatible = "snps,dwc3";
|
|
+ dr_mode = "host";
|
|
+ usb3-lpm-capable;
|
|
+ snps,axi-pipe-limit = /bits/ 8 <8>;
|
|
+ snps,dis_rxdet_inp3_quirk;
|
|
+ snps,tx-max-burst-prd = <8>;
|
|
+ snps,tx-thr-num-pkt-prd = <2>;
|
|
+ interrupts = <RP1_INT_USBHOST0_0 IRQ_TYPE_EDGE_RISING>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_usb1: usb@300000 {
|
|
+ reg = <0xc0 0x40300000 0x0 0x100000>;
|
|
+ compatible = "snps,dwc3";
|
|
+ dr_mode = "host";
|
|
+ usb3-lpm-capable;
|
|
+ snps,axi-pipe-limit = /bits/ 8 <8>;
|
|
+ snps,dis_rxdet_inp3_quirk;
|
|
+ snps,tx-max-burst-prd = <8>;
|
|
+ snps,tx-thr-num-pkt-prd = <2>;
|
|
+ interrupts = <RP1_INT_USBHOST1_0 IRQ_TYPE_EDGE_RISING>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rp1_dsi0: dsi@110000 {
|
|
+ compatible = "raspberrypi,rp1dsi";
|
|
+ status = "disabled";
|
|
+ reg = <0xc0 0x40118000 0x0 0x1000>, // MIPI0 DSI DMA (ArgonDPI)
|
|
+ <0xc0 0x4011c000 0x0 0x1000>, // MIPI0 DSI Host (SNPS)
|
|
+ <0xc0 0x40120000 0x0 0x1000>; // MIPI0 CFG
|
|
+
|
|
+ interrupts = <RP1_INT_MIPI0 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>, // required, config bus clock
|
|
+ <&rp1_clocks RP1_CLK_MIPI0_DPI>, // required, pixel clock
|
|
+ <&clksrc_mipi0_dsi_byteclk>, // internal, parent for divide
|
|
+ <&clk_xosc>; // hardwired to DSI "refclk"
|
|
+ clock-names = "cfgclk", "dpiclk", "byteclk", "refclk";
|
|
+
|
|
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>,
|
|
+ <&rp1_clocks RP1_CLK_MIPI0_DPI>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+ assigned-clock-parents = <0>, <&clksrc_mipi0_dsi_byteclk>;
|
|
+ };
|
|
+
|
|
+ rp1_dsi1: dsi@128000 {
|
|
+ compatible = "raspberrypi,rp1dsi";
|
|
+ status = "disabled";
|
|
+ reg = <0xc0 0x40130000 0x0 0x1000>, // MIPI1 DSI DMA (ArgonDPI)
|
|
+ <0xc0 0x40134000 0x0 0x1000>, // MIPI1 DSI Host (SNPS)
|
|
+ <0xc0 0x40138000 0x0 0x1000>; // MIPI1 CFG
|
|
+
|
|
+ interrupts = <RP1_INT_MIPI1 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>, // required, config bus clock
|
|
+ <&rp1_clocks RP1_CLK_MIPI1_DPI>, // required, pixel clock
|
|
+ <&clksrc_mipi1_dsi_byteclk>, // internal, parent for divide
|
|
+ <&clk_xosc>; // hardwired to DSI "refclk"
|
|
+ clock-names = "cfgclk", "dpiclk", "byteclk", "refclk";
|
|
+
|
|
+ assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>,
|
|
+ <&rp1_clocks RP1_CLK_MIPI1_DPI>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+ assigned-clock-parents = <0>, <&clksrc_mipi1_dsi_byteclk>;
|
|
+ };
|
|
+
|
|
+ /* VEC and DPI both need to control PLL_VIDEO and cannot work together; */
|
|
+ /* config.txt should enable one or other using dtparam=vec or an overlay. */
|
|
+ rp1_vec: vec@144000 {
|
|
+ compatible = "raspberrypi,rp1vec";
|
|
+ status = "disabled";
|
|
+ reg = <0xc0 0x40144000 0x0 0x1000>, // VIDEO_OUT_VEC
|
|
+ <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG
|
|
+
|
|
+ interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&rp1_clocks RP1_CLK_VEC>;
|
|
+
|
|
+ assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>,
|
|
+ <&rp1_clocks RP1_PLL_VIDEO_SEC>,
|
|
+ <&rp1_clocks RP1_CLK_VEC>;
|
|
+ assigned-clock-rates = <1188000000>,
|
|
+ <108000000>,
|
|
+ <108000000>;
|
|
+ assigned-clock-parents = <0>,
|
|
+ <&rp1_clocks RP1_PLL_VIDEO_CORE>,
|
|
+ <&rp1_clocks RP1_PLL_VIDEO_SEC>;
|
|
+ };
|
|
+
|
|
+ rp1_dpi: dpi@148000 {
|
|
+ compatible = "raspberrypi,rp1dpi";
|
|
+ status = "disabled";
|
|
+ reg = <0xc0 0x40148000 0x0 0x1000>, // VIDEO_OUT DPI
|
|
+ <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG
|
|
+
|
|
+ interrupts = <RP1_INT_VIDEO_OUT IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&rp1_clocks RP1_CLK_DPI>, // DPI pixel clock
|
|
+ <&rp1_clocks RP1_PLL_VIDEO>, // PLL primary divider, and
|
|
+ <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control
|
|
+ clock-names = "dpiclk", "plldiv", "pllcore";
|
|
+
|
|
+ assigned-clocks = <&rp1_clocks RP1_CLK_DPI>;
|
|
+ assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&clocks {
|
|
+ clk_xosc: clk_xosc {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "xosc";
|
|
+ clock-frequency = <50000000>;
|
|
+ };
|
|
+ macb_pclk: macb_pclk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "pclk";
|
|
+ clock-frequency = <200000000>;
|
|
+ };
|
|
+ macb_hclk: macb_hclk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "hclk";
|
|
+ clock-frequency = <200000000>;
|
|
+ };
|
|
+ sdio_src: sdio_src {
|
|
+ // 400 MHz on FPGA. PLL sys VCO on asic
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "src";
|
|
+ clock-frequency = <1000000000>;
|
|
+ };
|
|
+ sdhci_core: sdhci_core {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "core";
|
|
+ clock-frequency = <50000000>;
|
|
+ };
|
|
+ clksrc_mipi0_dsi_byteclk: clksrc_mipi0_dsi_byteclk {
|
|
+ // This clock is synthesized by MIPI0 D-PHY, when DSI is running.
|
|
+ // Its frequency is not known a priori (until a panel driver attaches)
|
|
+ // so assign a made-up frequency of 72MHz so it can be divided for DPI.
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "clksrc_mipi0_dsi_byteclk";
|
|
+ clock-frequency = <72000000>;
|
|
+ };
|
|
+ clksrc_mipi1_dsi_byteclk: clksrc_mipi1_dsi_byteclk {
|
|
+ // This clock is synthesized by MIPI1 D-PHY, when DSI is running.
|
|
+ // Its frequency is not known a priori (until a panel driver attaches)
|
|
+ // so assign a made-up frequency of 72MHz so it can be divided for DPI.
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "clksrc_mipi1_dsi_byteclk";
|
|
+ clock-frequency = <72000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ rp1_vdd_3v3: rp1_vdd_3v3 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vdd-3v3";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/Makefile
|
|
+++ b/arch/arm/boot/dts/overlays/Makefile
|
|
@@ -49,8 +49,10 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
dionaudio-loco.dtbo \
|
|
dionaudio-loco-v2.dtbo \
|
|
disable-bt.dtbo \
|
|
+ disable-bt-pi5.dtbo \
|
|
disable-emmc2.dtbo \
|
|
disable-wifi.dtbo \
|
|
+ disable-wifi-pi5.dtbo \
|
|
dpi18.dtbo \
|
|
dpi18cpadhi.dtbo \
|
|
dpi24.dtbo \
|
|
@@ -106,8 +108,12 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
i2c-rtc-gpio.dtbo \
|
|
i2c-sensor.dtbo \
|
|
i2c0.dtbo \
|
|
+ i2c0-pi5.dtbo \
|
|
i2c1.dtbo \
|
|
+ i2c1-pi5.dtbo \
|
|
+ i2c2-pi5.dtbo \
|
|
i2c3.dtbo \
|
|
+ i2c3-pi5.dtbo \
|
|
i2c4.dtbo \
|
|
i2c5.dtbo \
|
|
i2c6.dtbo \
|
|
@@ -150,10 +156,15 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
media-center.dtbo \
|
|
merus-amp.dtbo \
|
|
midi-uart0.dtbo \
|
|
+ midi-uart0-pi5.dtbo \
|
|
midi-uart1.dtbo \
|
|
+ midi-uart1-pi5.dtbo \
|
|
midi-uart2.dtbo \
|
|
+ midi-uart2-pi5.dtbo \
|
|
midi-uart3.dtbo \
|
|
+ midi-uart3-pi5.dtbo \
|
|
midi-uart4.dtbo \
|
|
+ midi-uart4-pi5.dtbo \
|
|
midi-uart5.dtbo \
|
|
minipitft13.dtbo \
|
|
miniuart-bt.dtbo \
|
|
@@ -231,14 +242,20 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
spi1-2cs.dtbo \
|
|
spi1-3cs.dtbo \
|
|
spi2-1cs.dtbo \
|
|
+ spi2-1cs-pi5.dtbo \
|
|
spi2-2cs.dtbo \
|
|
+ spi2-2cs-pi5.dtbo \
|
|
spi2-3cs.dtbo \
|
|
spi3-1cs.dtbo \
|
|
+ spi3-1cs-pi5.dtbo \
|
|
spi3-2cs.dtbo \
|
|
+ spi3-2cs-pi5.dtbo \
|
|
spi4-1cs.dtbo \
|
|
spi4-2cs.dtbo \
|
|
spi5-1cs.dtbo \
|
|
+ spi5-1cs-pi5.dtbo \
|
|
spi5-2cs.dtbo \
|
|
+ spi5-2cs-pi5.dtbo \
|
|
spi6-1cs.dtbo \
|
|
spi6-2cs.dtbo \
|
|
ssd1306.dtbo \
|
|
@@ -253,10 +270,15 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
tpm-slb9670.dtbo \
|
|
tpm-slb9673.dtbo \
|
|
uart0.dtbo \
|
|
+ uart0-pi5.dtbo \
|
|
uart1.dtbo \
|
|
+ uart1-pi5.dtbo \
|
|
uart2.dtbo \
|
|
+ uart2-pi5.dtbo \
|
|
uart3.dtbo \
|
|
+ uart3-pi5.dtbo \
|
|
uart4.dtbo \
|
|
+ uart4-pi5.dtbo \
|
|
uart5.dtbo \
|
|
udrc.dtbo \
|
|
ugreen-dabboard.dtbo \
|
|
@@ -276,6 +298,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
vc4-kms-kippah-7inch.dtbo \
|
|
vc4-kms-v3d.dtbo \
|
|
vc4-kms-v3d-pi4.dtbo \
|
|
+ vc4-kms-v3d-pi5.dtbo \
|
|
vc4-kms-vga666.dtbo \
|
|
vga666.dtbo \
|
|
vl805.dtbo \
|
|
--- a/arch/arm/boot/dts/overlays/README
|
|
+++ b/arch/arm/boot/dts/overlays/README
|
|
@@ -151,6 +151,9 @@ Params:
|
|
bdaddr=06:05:04:03:02:01
|
|
will set the BDADDR to 01:02:03:04:05:06.
|
|
|
|
+ button_debounce Set the debounce delay (in ms) on the power/
|
|
+ shutdown button (default 50ms)
|
|
+
|
|
cam0_reg Enables CAM 0 regulator.
|
|
Only required on CM1 & 3.
|
|
|
|
@@ -167,6 +170,9 @@ Params:
|
|
Default of GPIO expander 5 on CM4, but override
|
|
switches to normal GPIO.
|
|
|
|
+ cooling_fan Enables the Pi 5 cooling fan (enabled
|
|
+ automatically by the firmware)
|
|
+
|
|
eee Enable Energy Efficient Ethernet support for
|
|
compatible devices (default "on"). See also
|
|
"tx_lpi_timer". Pi3B+ only.
|
|
@@ -206,23 +212,29 @@ Params:
|
|
hdmi Set to "off" to disable the HDMI interface
|
|
(default "on")
|
|
|
|
+ i2c An alias for i2c_arm
|
|
+
|
|
i2c_arm Set to "on" to enable the ARM's i2c interface
|
|
(default "off")
|
|
|
|
+ i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
|
|
+ (default "100000")
|
|
+
|
|
+ i2c_baudrate An alias for i2c_arm_baudrate
|
|
+
|
|
+ i2c_csi_dsi Set to "on" to enable the i2c_csi_dsi interface
|
|
+
|
|
+ i2c_csi_dsi0 Set to "on" to enable the i2c_csi_dsi0 interface
|
|
+
|
|
+ i2c_csi_dsi1 Set to "on" to enable the i2c_csi_dsi1 interface
|
|
+
|
|
i2c_vc Set to "on" to enable the i2c interface
|
|
usually reserved for the VideoCore processor
|
|
(default "off")
|
|
|
|
- i2c An alias for i2c_arm
|
|
-
|
|
- i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
|
|
- (default "100000")
|
|
-
|
|
i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
|
|
(default "100000")
|
|
|
|
- i2c_baudrate An alias for i2c_arm_baudrate
|
|
-
|
|
i2s Set to "on" to enable the i2s interface
|
|
(default "off")
|
|
|
|
@@ -237,11 +249,23 @@ Params:
|
|
krnbt_baudrate Set the baudrate of the PL011 UART when used
|
|
with krnbt=on
|
|
|
|
+ nvme Alias for "pciex1" (2712 only)
|
|
+
|
|
pcie Set to "off" to disable the PCIe interface
|
|
(default "on")
|
|
(2711 only, but not applicable on CM4S)
|
|
N.B. USB-A ports on 4B are subsequently disabled
|
|
|
|
+ pciex1 Set to "on" to enable the external PCIe link
|
|
+ (2712 only, default "off")
|
|
+
|
|
+ pciex1_gen Sets the PCIe "GEN"/speed for the external PCIe
|
|
+ link (2712 only, default "2")
|
|
+
|
|
+ pciex1_no_l0s Set to "on" to disable ASPM L0s on the external
|
|
+ PCIe link for devices that have broken
|
|
+ implementations (2712 only, default "off")
|
|
+
|
|
spi Set to "on" to enable the spi interfaces
|
|
(default "off")
|
|
|
|
@@ -252,6 +276,11 @@ Params:
|
|
random Set to "on" to enable the hardware random
|
|
number generator (default "on")
|
|
|
|
+ rtc_bbat_vchg Set the RTC backup battery charging voltage in
|
|
+ microvolts. If set to 0 or not specified, the
|
|
+ trickle charger is disabled.
|
|
+ (2712 only, default "0")
|
|
+
|
|
sd Set to "off" to disable the SD card (or eMMC on
|
|
non-lite SKU of CM4).
|
|
(default "on")
|
|
@@ -276,18 +305,30 @@ Params:
|
|
sdio_overclock Clock (in MHz) to use when the MMC framework
|
|
requests 50MHz for the SDIO/WLAN interface.
|
|
|
|
+ suspend Make the power button trigger a suspend rather
|
|
+ than a power-off (2712 only, default "off")
|
|
+
|
|
tx_lpi_timer Set the delay in microseconds between going idle
|
|
and entering the low power state (default 600).
|
|
Requires EEE to be enabled - see "eee".
|
|
|
|
uart0 Set to "off" to disable uart0 (default "on")
|
|
|
|
+ uart0_console Move the kernel boot console to UART0 on pins
|
|
+ 6, 8 and 10 of the 40-way header (2712 only,
|
|
+ default "off")
|
|
+
|
|
uart1 Set to "on" or "off" to enable or disable uart1
|
|
(default varies)
|
|
|
|
watchdog Set to "on" to enable the hardware watchdog
|
|
(default "off")
|
|
|
|
+ wifiaddr Set an alternative WiFi MAC address.
|
|
+ The value should be a 6-byte hexadecimal value,
|
|
+ with or without colon separators, written in the
|
|
+ natural (big-endian) order.
|
|
+
|
|
act_led_trigger Choose which activity the LED tracks.
|
|
Use "heartbeat" for a nice load indicator.
|
|
(default "mmc")
|
|
@@ -919,14 +960,16 @@ Params: 24db_digital_gain Allow ga
|
|
|
|
|
|
Name: disable-bt
|
|
-Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring
|
|
- UART0/ttyAMA0 over GPIOs 14 & 15.
|
|
- N.B. To disable the systemd service that initialises the modem so it
|
|
- doesn't use the UART, use 'sudo systemctl disable hciuart'.
|
|
+Info: Disable onboard Bluetooth on Bluetooth-capable Raspberry Pis. On Pis
|
|
+ prior to Pi 5 this restores UART0/ttyAMA0 over GPIOs 14 & 15.
|
|
Load: dtoverlay=disable-bt
|
|
Params: <None>
|
|
|
|
|
|
+Name: disable-bt-pi5
|
|
+Info: See disable-bt
|
|
+
|
|
+
|
|
Name: disable-emmc2
|
|
Info: Disable EMMC2 controller on BCM2711.
|
|
The allows the onboard EMMC storage on Compute Module 4 to be disabled
|
|
@@ -936,11 +979,15 @@ Params: <None>
|
|
|
|
|
|
Name: disable-wifi
|
|
-Info: Disable onboard WLAN on Pi 3B, 3B+, 3A+, 4B and Zero W.
|
|
+Info: Disable onboard WLAN on WiFi-capable Raspberry Pis.
|
|
Load: dtoverlay=disable-wifi
|
|
Params: <None>
|
|
|
|
|
|
+Name: disable-wifi-pi5
|
|
+Info: See disable-wifi
|
|
+
|
|
+
|
|
Name: dpi18
|
|
Info: Overlay for a generic 18-bit DPI display
|
|
This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
|
|
@@ -2233,6 +2280,15 @@ Info: Deprecated, legacy version of i2
|
|
Load: <Deprecated>
|
|
|
|
|
|
+Name: i2c0-pi5
|
|
+Info: Enable i2c0 (Pi 5 only)
|
|
+Load: dtoverlay=i2c0-pi5,<param>=<val>
|
|
+Params: pins_0_1 Use GPIOs 0 and 1 (default)
|
|
+ pins_8_9 Use GPIOs 8 and 9
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
Name: i2c1
|
|
Info: Change i2c1 pin usage. Not all pin combinations are usable on all
|
|
platforms - platforms other then Compute Modules can only use this
|
|
@@ -2249,6 +2305,24 @@ Info: Deprecated, legacy version of i2
|
|
Load: <Deprecated>
|
|
|
|
|
|
+Name: i2c1-pi5
|
|
+Info: Enable i2c1 (Pi 5 only)
|
|
+Load: dtoverlay=i2c1-pi5,<param>=<val>
|
|
+Params: pins_2_3 Use GPIOs 2 and 3 (default)
|
|
+ pins_10_11 Use GPIOs 10 and 11
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
+Name: i2c2-pi5
|
|
+Info: Enable i2c2 (Pi 5 only)
|
|
+Load: dtoverlay=i2c2-pi5,<param>=<val>
|
|
+Params: pins_4_5 Use GPIOs 4 and 5 (default)
|
|
+ pins_12_13 Use GPIOs 12 and 13
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
Name: i2c3
|
|
Info: Enable the i2c3 bus. BCM2711 only.
|
|
Load: dtoverlay=i2c3,<param>
|
|
@@ -2258,6 +2332,16 @@ Params: pins_2_3 Use GPIO
|
|
"100000")
|
|
|
|
|
|
+Name: i2c3-pi5
|
|
+Info: Enable i2c3 (Pi 5 only)
|
|
+Load: dtoverlay=i2c3-pi5,<param>=<val>
|
|
+Params: pins_6_7 Use GPIOs 6 and 7 (default)
|
|
+ pins_14_15 Use GPIOs 14 and 15
|
|
+ pins_22_23 Use GPIOs 22 and 23
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
Name: i2c4
|
|
Info: Enable the i2c4 bus. BCM2711 only.
|
|
Load: dtoverlay=i2c4,<param>
|
|
@@ -2869,6 +2953,10 @@ Load: dtoverlay=midi-uart0
|
|
Params: <None>
|
|
|
|
|
|
+Name: midi-uart0-pi5
|
|
+Info: See midi-uart0 (this is the Pi 5 version)
|
|
+
|
|
+
|
|
Name: midi-uart1
|
|
Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
|
|
31.25kbaud, the frequency required for MIDI
|
|
@@ -2876,29 +2964,45 @@ Load: dtoverlay=midi-uart1
|
|
Params: <None>
|
|
|
|
|
|
+Name: midi-uart1-pi5
|
|
+Info: See midi-uart1 (this is the Pi 5 version)
|
|
+
|
|
+
|
|
Name: midi-uart2
|
|
-Info: Configures UART2 (ttyAMA1) so that a requested 38.4kbaud actually gets
|
|
+Info: Configures UART2 (ttyAMA2) so that a requested 38.4kbaud actually gets
|
|
31.25kbaud, the frequency required for MIDI
|
|
Load: dtoverlay=midi-uart2
|
|
Params: <None>
|
|
|
|
|
|
+Name: midi-uart2-pi5
|
|
+Info: See midi-uart2 (this is the Pi 5 version)
|
|
+
|
|
+
|
|
Name: midi-uart3
|
|
-Info: Configures UART3 (ttyAMA2) so that a requested 38.4kbaud actually gets
|
|
+Info: Configures UART3 (ttyAMA3) so that a requested 38.4kbaud actually gets
|
|
31.25kbaud, the frequency required for MIDI
|
|
Load: dtoverlay=midi-uart3
|
|
Params: <None>
|
|
|
|
|
|
+Name: midi-uart3-pi5
|
|
+Info: See midi-uart3 (this is the Pi 5 version)
|
|
+
|
|
+
|
|
Name: midi-uart4
|
|
-Info: Configures UART4 (ttyAMA3) so that a requested 38.4kbaud actually gets
|
|
+Info: Configures UART4 (ttyAMA4) so that a requested 38.4kbaud actually gets
|
|
31.25kbaud, the frequency required for MIDI
|
|
Load: dtoverlay=midi-uart4
|
|
Params: <None>
|
|
|
|
|
|
+Name: midi-uart4-pi5
|
|
+Info: See midi-uart4 (this is the Pi 5 version)
|
|
+
|
|
+
|
|
Name: midi-uart5
|
|
-Info: Configures UART5 (ttyAMA4) so that a requested 38.4kbaud actually gets
|
|
+Info: Configures UART5 (ttyAMA5) so that a requested 38.4kbaud actually gets
|
|
31.25kbaud, the frequency required for MIDI
|
|
Load: dtoverlay=midi-uart5
|
|
Params: <None>
|
|
@@ -3921,105 +4025,131 @@ Name: spi1-1cs
|
|
Info: Enables spi1 with a single chip select (CS) line and associated spidev
|
|
dev node. The gpio pin number for the CS line and spidev device node
|
|
creation are configurable.
|
|
- N.B.: spi1 is only accessible on devices with a 40pin header, eg:
|
|
- A+, B+, Zero and PI2 B; as well as the Compute Module.
|
|
+ N.B.: spi1 is not accessible on old Pis without a 40-pin header.
|
|
Load: dtoverlay=spi1-1cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
|
|
- cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev1.0 (default
|
|
- is 'okay' or enabled).
|
|
+ is 'on' or enabled).
|
|
|
|
|
|
Name: spi1-2cs
|
|
Info: Enables spi1 with two chip select (CS) lines and associated spidev
|
|
dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
creation are configurable.
|
|
- N.B.: spi1 is only accessible on devices with a 40pin header, eg:
|
|
- A+, B+, Zero and PI2 B; as well as the Compute Module.
|
|
+ N.B.: spi1 is not accessible on old Pis without a 40-pin header.
|
|
Load: dtoverlay=spi1-2cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
|
|
cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
|
|
- cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev1.0 (default
|
|
- is 'okay' or enabled).
|
|
- cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev1.1 (default
|
|
- is 'okay' or enabled).
|
|
+ is 'on' or enabled).
|
|
|
|
|
|
Name: spi1-3cs
|
|
Info: Enables spi1 with three chip select (CS) lines and associated spidev
|
|
dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
creation are configurable.
|
|
- N.B.: spi1 is only accessible on devices with a 40pin header, eg:
|
|
- A+, B+, Zero and PI2 B; as well as the Compute Module.
|
|
+ N.B.: spi1 is not accessible on old Pis without a 40-pin header.
|
|
Load: dtoverlay=spi1-3cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
|
|
cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
|
|
cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
|
|
- cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev1.0 (default
|
|
- is 'okay' or enabled).
|
|
- cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev1.1 (default
|
|
- is 'okay' or enabled).
|
|
- cs2_spidev Set to 'disabled' to stop the creation of a
|
|
+ is 'on' or enabled).
|
|
+ cs2_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev1.2 (default
|
|
- is 'okay' or enabled).
|
|
+ is 'on' or enabled).
|
|
|
|
|
|
Name: spi2-1cs
|
|
-Info: Enables spi2 with a single chip select (CS) line and associated spidev
|
|
- dev node. The gpio pin number for the CS line and spidev device node
|
|
- creation are configurable.
|
|
- N.B.: spi2 is only accessible with the Compute Module.
|
|
+Info: Enables spi2 on GPIOs 40-42 with a single chip select (CS) line and
|
|
+ associated spidev dev node. The gpio pin number for the CS line and
|
|
+ spidev device node creation are configurable. spi2-2cs-pi5 is
|
|
+ substituted on a Pi 5.
|
|
+ N.B.: spi2 is only accessible with the Compute Module or Pi 5.
|
|
Load: dtoverlay=spi2-1cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
|
|
- cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev2.0 (default
|
|
- is 'okay' or enabled).
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi2-1cs-pi5
|
|
+Info: Enables spi2 on GPIOs 1-3 with a single chip select (CS) line and
|
|
+ associated spidev dev node. The gpio pin number for the CS line and
|
|
+ spidev device node creation are configurable. Pi 5 only.
|
|
+Load: dtoverlay=spi2-1cs-pi5,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 0).
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.0 (default
|
|
+ is 'on' or enabled).
|
|
|
|
|
|
Name: spi2-2cs
|
|
-Info: Enables spi2 with two chip select (CS) lines and associated spidev
|
|
- dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
- creation are configurable.
|
|
- N.B.: spi2 is only accessible with the Compute Module.
|
|
+Info: Enables spi2 on GPIOs 40-42 with two chip select (CS) lines and
|
|
+ associated spidev dev nodes. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable. spi2-2cs-pi5 is
|
|
+ substituted on a Pi 5.
|
|
+ N.B.: spi2 is only accessible with the Compute Module or Pi 5.
|
|
Load: dtoverlay=spi2-2cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
|
|
cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
|
|
- cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.0 (default
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.1 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi2-2cs-pi5
|
|
+Info: Enables spi2 on GPIOs 1-3 with two chip select (CS) lines and
|
|
+ associated spidev dev nodes. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable. Pi 5 only.
|
|
+Load: dtoverlay=spi2-2cs-pi5,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 0).
|
|
+ cs1_pin GPIO pin for CS1 (default 24).
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev2.0 (default
|
|
- is 'okay' or enabled).
|
|
- cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev2.1 (default
|
|
- is 'okay' or enabled).
|
|
+ is 'on' or enabled).
|
|
|
|
|
|
Name: spi2-3cs
|
|
-Info: Enables spi2 with three chip select (CS) lines and associated spidev
|
|
- dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
- creation are configurable.
|
|
- N.B.: spi2 is only accessible with the Compute Module.
|
|
+Info: Enables spi2 on GPIOs 40-42 with three chip select (CS) lines and
|
|
+ associated spidev dev nodes. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable.
|
|
+ N.B.: spi2 is only accessible with the Compute Module or Pi 5.
|
|
Load: dtoverlay=spi2-3cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
|
|
cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
|
|
cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
|
|
- cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ cs0_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev2.0 (default
|
|
- is 'okay' or enabled).
|
|
- cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev2.1 (default
|
|
- is 'okay' or enabled).
|
|
- cs2_spidev Set to 'disabled' to stop the creation of a
|
|
+ is 'on' or enabled).
|
|
+ cs2_spidev Set to 'off' to stop the creation of a
|
|
userspace device node /dev/spidev2.2 (default
|
|
- is 'okay' or enabled).
|
|
+ is 'on' or enabled).
|
|
|
|
|
|
Name: spi3-1cs
|
|
-Info: Enables spi3 with a single chip select (CS) line and associated spidev
|
|
- dev node. The gpio pin number for the CS line and spidev device node
|
|
- creation are configurable. BCM2711 only.
|
|
+Info: Enables spi3 on GPIOs 1-3 with a single chip select (CS) line and
|
|
+ associated spidev dev node. The gpio pin number for the CS line and
|
|
+ spidev device node creation are configurable. BCM2711 only,
|
|
+ spi3-1cs-pi5 is substituted on Pi 5.
|
|
Load: dtoverlay=spi3-1cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
|
|
cs0_spidev Set to 'off' to prevent the creation of a
|
|
@@ -4027,10 +4157,22 @@ Params: cs0_pin GPIO pin
|
|
is 'on' or enabled).
|
|
|
|
|
|
+Name: spi3-1cs-pi5
|
|
+Info: Enables spi3 on GPIOs 5-7 with a single chip select (CS) line and
|
|
+ associated spidev dev node. The gpio pin number for the CS line and
|
|
+ spidev device node creation are configurable. Pi 5 only.
|
|
+Load: dtoverlay=spi3-1cs-pi5,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 4).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev3.0 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
Name: spi3-2cs
|
|
-Info: Enables spi3 with two chip select (CS) lines and associated spidev
|
|
- dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
- creation are configurable. BCM2711 only.
|
|
+Info: Enables spi3 on GPIO2 1-3 with two chip select (CS) lines and
|
|
+ associated spidev dev nodes. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable. BCM2711 only,
|
|
+ spi3-2cs-pi5 is substituted on Pi 5.
|
|
Load: dtoverlay=spi3-2cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
|
|
cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
|
|
@@ -4042,10 +4184,25 @@ Params: cs0_pin GPIO pin
|
|
is 'on' or enabled).
|
|
|
|
|
|
+Name: spi3-2cs-pi5
|
|
+Info: Enables spi3 on GPIOs 5-7 with two chip select (CS) lines and
|
|
+ associated spidev dev nodes. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable. Pi 5 only.
|
|
+Load: dtoverlay=spi3-2cs-pi5,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 4).
|
|
+ cs1_pin GPIO pin for CS1 (default 25).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev3.0 (default
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev3.1 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
Name: spi4-1cs
|
|
-Info: Enables spi4 with a single chip select (CS) line and associated spidev
|
|
- dev node. The gpio pin number for the CS line and spidev device node
|
|
- creation are configurable. BCM2711 only.
|
|
+Info: Enables spi4 on GPIOs 5-7 with a single chip select (CS) line and
|
|
+ associated spidev dev node. The gpio pin number for the CS line and
|
|
+ spidev device node creation are configurable. BCM2711 only.
|
|
Load: dtoverlay=spi4-1cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
|
|
cs0_spidev Set to 'off' to prevent the creation of a
|
|
@@ -4054,9 +4211,9 @@ Params: cs0_pin GPIO pin
|
|
|
|
|
|
Name: spi4-2cs
|
|
-Info: Enables spi4 with two chip select (CS) lines and associated spidev
|
|
- dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
- creation are configurable. BCM2711 only.
|
|
+Info: Enables spi4 on GPIOs 5-6 with two chip select (CS) lines and
|
|
+ associated spidev dev nodes. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable. BCM2711 only.
|
|
Load: dtoverlay=spi4-2cs,<param>=<val>
|
|
Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
|
|
cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
|
|
@@ -4069,23 +4226,27 @@ Params: cs0_pin GPIO pin
|
|
|
|
|
|
Name: spi5-1cs
|
|
-Info: Enables spi5 with a single chip select (CS) line and associated spidev
|
|
- dev node. The gpio pin numbers for the CS lines and spidev device node
|
|
- creation are configurable. BCM2711 only.
|
|
+Info: Enables spi5 on GPIOs 13-15 with a single chip select (CS) line and
|
|
+ associated spidev dev node. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable. BCM2711 and Pi 5.
|
|
Load: dtoverlay=spi5-1cs,<param>=<val>
|
|
-Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
|
|
+Params: cs0_pin GPIO pin for CS0 (default 12).
|
|
cs0_spidev Set to 'off' to prevent the creation of a
|
|
userspace device node /dev/spidev5.0 (default
|
|
is 'on' or enabled).
|
|
|
|
|
|
+Name: spi5-1cs-pi5
|
|
+Info: See spi5-1cs
|
|
+
|
|
+
|
|
Name: spi5-2cs
|
|
-Info: Enables spi5 with two chip select (CS) lines and associated spidev
|
|
- dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
- creation are configurable. BCM2711 only.
|
|
+Info: Enables spi5 on GPIOs 13-15 with two chip select (CS) lines and
|
|
+ associated spidev dev nodes. The gpio pin numbers for the CS lines and
|
|
+ spidev device node creation are configurable. BCM2711 and Pi 5.
|
|
Load: dtoverlay=spi5-2cs,<param>=<val>
|
|
-Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
|
|
- cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
|
|
+Params: cs0_pin GPIO pin for CS0 (default 12).
|
|
+ cs1_pin GPIO pin for CS1 (default 26).
|
|
cs0_spidev Set to 'off' to prevent the creation of a
|
|
userspace device node /dev/spidev5.0 (default
|
|
is 'on' or enabled).
|
|
@@ -4094,6 +4255,10 @@ Params: cs0_pin GPIO pin
|
|
is 'on' or enabled).
|
|
|
|
|
|
+Name: spi5-2cs-pi5
|
|
+Info: See spi5-2cs
|
|
+
|
|
+
|
|
Name: spi6-1cs
|
|
Info: Enables spi6 with a single chip select (CS) line and associated spidev
|
|
dev node. The gpio pin number for the CS line and spidev device node
|
|
@@ -4296,6 +4461,12 @@ Params: txd0_pin GPIO pin
|
|
7(Alt3) for 32&33, 6(Alt2) for 36&37
|
|
|
|
|
|
+Name: uart0-pi5
|
|
+Info: Enable uart 0 on GPIOs 14-15. Pi 5 only.
|
|
+Load: dtoverlay=uart0-pi5,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 16-17 (default off)
|
|
+
|
|
+
|
|
Name: uart1
|
|
Info: Change the pin usage of uart1
|
|
Load: dtoverlay=uart1,<param>=<val>
|
|
@@ -4304,24 +4475,48 @@ Params: txd1_pin GPIO pin
|
|
rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
|
|
|
|
|
|
+Name: uart1-pi5
|
|
+Info: Enable uart 1 on GPIOs 0-1. Pi 5 only.
|
|
+Load: dtoverlay=uart1-pi5,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
|
|
+
|
|
+
|
|
Name: uart2
|
|
Info: Enable uart 2 on GPIOs 0-3. BCM2711 only.
|
|
Load: dtoverlay=uart2,<param>
|
|
Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
|
|
|
|
|
|
+Name: uart2-pi5
|
|
+Info: Enable uart 2 on GPIOs 4-5. Pi 5 only.
|
|
+Load: dtoverlay=uart2-pi5,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
|
|
+
|
|
+
|
|
Name: uart3
|
|
Info: Enable uart 3 on GPIOs 4-7. BCM2711 only.
|
|
Load: dtoverlay=uart3,<param>
|
|
Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
|
|
|
|
|
|
+Name: uart3-pi5
|
|
+Info: Enable uart 3 on GPIOs 8-9. Pi 5 only.
|
|
+Load: dtoverlay=uart3-pi5,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
|
|
+
|
|
+
|
|
Name: uart4
|
|
Info: Enable uart 4 on GPIOs 8-11. BCM2711 only.
|
|
Load: dtoverlay=uart4,<param>
|
|
Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
|
|
|
|
|
|
+Name: uart4-pi5
|
|
+Info: Enable uart 4 on GPIOs 12-13. Pi 5 only.
|
|
+Load: dtoverlay=uart4-pi5,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off)
|
|
+
|
|
+
|
|
Name: uart5
|
|
Info: Enable uart 5 on GPIOs 12-15. BCM2711 only.
|
|
Load: dtoverlay=uart5,<param>
|
|
@@ -4530,6 +4725,8 @@ Params: sizex Touchscr
|
|
invy Touchscreen inverted y axis
|
|
swapxy Touchscreen swapped x y axis
|
|
disable_touch Disables the touch screen overlay driver
|
|
+ dsi0 Use DSI0 and i2c_csi_dsi0 (rather than
|
|
+ the default DSI1 and i2c_csi_dsi).
|
|
|
|
|
|
Name: vc4-kms-dsi-lt070me05000
|
|
@@ -4579,6 +4776,8 @@ Params: 2_8_inch 2.8" 480
|
|
invx Touchscreen inverted x axis
|
|
invy Touchscreen inverted y axis
|
|
swapxy Touchscreen swapped x y axis
|
|
+ dsi0 Use DSI0 and i2c_csi_dsi0 (rather than
|
|
+ the default DSI1 and i2c_csi_dsi).
|
|
|
|
|
|
Name: vc4-kms-kippah-7inch
|
|
@@ -4633,6 +4832,9 @@ Params: cma-512 CMA is 5
|
|
nohdmi1 Disable HDMI 1 output
|
|
|
|
|
|
+Name: vc4-kms-v3d-pi5
|
|
+Info: See vc4-kms-v3d-pi4 (this is the Pi 5 version)
|
|
+
|
|
|
|
Name: vc4-kms-vga666
|
|
Info: Enable the VGA666 (resistor ladder ADC) for the vc4-kms-v3d driver.
|
|
--- a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
|
|
@@ -23,7 +23,7 @@
|
|
};
|
|
|
|
fragment@1 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -33,7 +33,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "adi,adau1977-adc";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
|
|
@@ -5,7 +5,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -37,7 +37,7 @@
|
|
"PDM_DAT", "Microphone Jack";
|
|
status = "okay";
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
dailink0_slave: simple-audio-card,codec {
|
|
sound-dai = <&adau7002_codec>;
|
|
--- a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -38,7 +38,7 @@
|
|
card_name = "Akkordion";
|
|
dai_name = "IQaudIO DAC";
|
|
dai_stream_name = "IQaudIO DAC HiFi";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
|
|
@@ -18,8 +18,8 @@
|
|
};
|
|
};
|
|
|
|
- fragment@1 {
|
|
- target = <&i2s>;
|
|
+ frag1: fragment@1 {
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -46,7 +46,7 @@
|
|
target = <&sound>;
|
|
boss_dac: __overlay__ {
|
|
compatible = "allo,boss-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
mute-gpios = <&gpio 6 1>;
|
|
status = "okay";
|
|
};
|
|
@@ -54,6 +54,8 @@
|
|
|
|
__overrides__ {
|
|
24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
|
|
- slave = <&boss_dac>,"allo,slave?";
|
|
+ slave = <&boss_dac>,"allo,slave?",
|
|
+ <&frag1>,"target:0=",<&i2s_clk_producer>,
|
|
+ <&boss_dac>,"i2s-controller:0=",<&i2s_clk_producer>;
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
|
|
@@ -8,7 +8,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
--- a/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -35,7 +35,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "allo,allo-digione";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
clock44-gpio = <&gpio 5 0>;
|
|
clock48-gpio = <&gpio 6 0>;
|
|
--- a/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
--- a/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
|
|
@@ -16,7 +16,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -42,7 +42,7 @@
|
|
target = <&sound>;
|
|
piano_dac: __overlay__ {
|
|
compatible = "allo,piano-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -41,7 +41,7 @@
|
|
piano_dac: __overlay__ {
|
|
compatible = "allo,piano-dac-plus";
|
|
audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
mute1-gpios = <&gpio 6 1>;
|
|
mute2-gpios = <&gpio 25 1>;
|
|
status = "okay";
|
|
--- a/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
|
|
@@ -16,7 +16,7 @@
|
|
format = "i2s";
|
|
|
|
p_cpu_dai: cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
dai-tdm-slot-num = <2>;
|
|
dai-tdm-slot-width = <32>;
|
|
};
|
|
@@ -40,7 +40,7 @@
|
|
};
|
|
|
|
fragment@2 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
--- a/arch/arm/boot/dts/overlays/arducam-64mp-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/arducam-64mp-overlay.dts
|
|
@@ -67,7 +67,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/arducam-pivariety-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/arducam-pivariety-overlay.dts
|
|
@@ -85,7 +85,7 @@
|
|
rotation = <&arducam_pivariety>,"rotation:0";
|
|
orientation = <&arducam_pivariety>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&arducam_pivariety>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -48,7 +48,7 @@
|
|
mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
|
|
<&gpio 24 0>;
|
|
reset-gpios = <&gpio 5 0>;
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
codec = <&cs42448>;
|
|
status = "okay";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/audioinjector-bare-i2s-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-bare-i2s-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -27,7 +27,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "simple-audio-card";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
|
|
simple-audio-card,name = "audioinjector-bare";
|
|
@@ -37,7 +37,7 @@
|
|
simple-audio-card,frame-master = <&dailink0_master>;
|
|
|
|
dailink0_master: simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
dai-tdm-slot-num = <2>;
|
|
dai-tdm-slot-width = <32>;
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -47,7 +47,7 @@
|
|
snd: __overlay__ {
|
|
compatible = "ai,audioinjector-isolated-soundcard";
|
|
mute-gpios = <&gpio 17 0>;
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
codec = <&cs4272>;
|
|
status = "okay";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -33,7 +33,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "simple-audio-card";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
|
|
simple-audio-card,name = "audioinjector-ultra";
|
|
@@ -57,7 +57,7 @@
|
|
simple-audio-card,frame-master = <&sound_master>;
|
|
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_consumer>;
|
|
dai-tdm-slot-num = <2>;
|
|
dai-tdm-slot-width = <32>;
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "ai,audioinjector-pi-soundcard";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
|
|
@@ -8,7 +8,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -75,7 +75,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "as,audiosense-pi";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "chipdip,chipdip-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
sr0-gpios = <&gpio 5 0>;
|
|
sr1-gpios = <&gpio 6 0>;
|
|
sr2-gpios = <&gpio 12 0>;
|
|
--- a/arch/arm/boot/dts/overlays/cirrus-wm5102-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/cirrus-wm5102-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -165,7 +165,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "wlf,rpi-cirrus";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/dacberry400-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/dacberry400-overlay.dts
|
|
@@ -5,7 +5,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -62,7 +62,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "osaelectronics,dacberry400";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/dionaudio-kiwi-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/dionaudio-kiwi-overlay.dts
|
|
@@ -11,7 +11,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "dionaudio,dionaudio-kiwi";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
|
|
@@ -11,7 +11,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "dionaudio,loco-pcm5242-tpa3118";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
|
|
@@ -15,13 +15,13 @@
|
|
target = <&sound>;
|
|
frag0: __overlay__ {
|
|
compatible = "dionaudio,dionaudio-loco-v2";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
fragment@1 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/disable-bt-pi5-overlay.dts
|
|
@@ -0,0 +1,17 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/* Disable Bluetooth */
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&bluetooth>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/disable-wifi-pi5-overlay.dts
|
|
@@ -0,0 +1,13 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&sdio2>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/draws-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
/ {
|
|
compatible = "brcm,bcm2835";
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -131,7 +131,7 @@
|
|
target = <&sound>;
|
|
snd: __overlay__ {
|
|
compatible = "simple-audio-card";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
|
|
simple-audio-card,name = "draws";
|
|
@@ -153,7 +153,7 @@
|
|
"Line Out", "LOL";
|
|
|
|
dailink0_master: simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
|
|
simple-audio-card,codec {
|
|
--- a/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
|
|
@@ -25,21 +25,21 @@
|
|
};
|
|
|
|
__overrides__ {
|
|
- i2c0 = <&frag13>,"target:0=",<&i2c0>;
|
|
- i2c1 = <&frag13>, "target?=0",
|
|
- <&frag13>, "target-path=i2c1",
|
|
+ i2c0 = <&ts_i2c_frag>,"target:0=",<&i2c0>;
|
|
+ i2c1 = <&ts_i2c_frag>, "target?=0",
|
|
+ <&ts_i2c_frag>, "target-path=i2c1",
|
|
<0>,"-0-1";
|
|
- i2c3 = <&frag13>, "target?=0",
|
|
- <&frag13>, "target-path=i2c3",
|
|
+ i2c3 = <&ts_i2c_frag>, "target?=0",
|
|
+ <&ts_i2c_frag>, "target-path=i2c3",
|
|
<0>,"-0-1";
|
|
- i2c4 = <&frag13>, "target?=0",
|
|
- <&frag13>, "target-path=i2c4",
|
|
+ i2c4 = <&ts_i2c_frag>, "target?=0",
|
|
+ <&ts_i2c_frag>, "target-path=i2c4",
|
|
<0>,"-0-1";
|
|
- i2c5 = <&frag13>, "target?=0",
|
|
- <&frag13>, "target-path=i2c5",
|
|
+ i2c5 = <&ts_i2c_frag>, "target?=0",
|
|
+ <&ts_i2c_frag>, "target-path=i2c5",
|
|
<0>,"-0-1";
|
|
- i2c6 = <&frag13>, "target?=0",
|
|
- <&frag13>, "target-path=i2c6",
|
|
+ i2c6 = <&ts_i2c_frag>, "target?=0",
|
|
+ <&ts_i2c_frag>, "target-path=i2c6",
|
|
<0>,"-0-1";
|
|
addr = <&ft5406>,"reg:0";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
|
|
+++ b/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
|
|
@@ -22,11 +22,13 @@
|
|
};
|
|
};
|
|
|
|
- fragment@12 {
|
|
- target = <&i2cbus>;
|
|
+ ts_i2c_frag: fragment@12 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
__overlay__ {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
ft5406: ts@38 {
|
|
compatible = "edt,edt-ft5506";
|
|
reg = <0x38>;
|
|
@@ -37,13 +39,6 @@
|
|
};
|
|
};
|
|
|
|
- frag13: fragment@13 {
|
|
- target = <&i2c_csi_dsi>;
|
|
- i2cbus: __overlay__ {
|
|
- status = "okay";
|
|
- };
|
|
- };
|
|
-
|
|
__overrides__ {
|
|
sizex = <&ft5406>,"touchscreen-size-x:0";
|
|
sizey = <&ft5406>,"touchscreen-size-y:0";
|
|
--- a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
|
|
@@ -53,7 +53,7 @@
|
|
};
|
|
|
|
fragment@3 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -63,7 +63,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "fe-pi,fe-pi-audio";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
|
|
@@ -14,7 +14,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -43,7 +43,7 @@
|
|
target = <&sound>;
|
|
iqaudio_dac: __overlay__ {
|
|
compatible = "iqaudio,iqaudio-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
mute-gpios = <& 0 0>;
|
|
iqaudio-dac,auto-mute-amp;
|
|
status = "okay";
|
|
--- a/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -42,7 +42,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "googlevoicehat,googlevoicehat-soundcard";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "hifiberry,hifiberry-amp";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
|
|
@@ -15,8 +15,8 @@
|
|
};
|
|
};
|
|
|
|
- fragment@1 {
|
|
- target = <&i2s>;
|
|
+ frag1: fragment@1 {
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -46,7 +46,7 @@
|
|
target = <&sound>;
|
|
hifiberry_dacplus: __overlay__ {
|
|
compatible = "hifiberry,hifiberry-dacplus";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
mute-gpio = <&gpio 4 0>;
|
|
reset-gpio = <&gpio 17 0x11>;
|
|
@@ -56,7 +56,10 @@
|
|
__overrides__ {
|
|
24db_digital_gain =
|
|
<&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
|
|
- slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
|
|
+ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?",
|
|
+ <&frag1>,"target:0=",<&i2s_clk_producer>,
|
|
+ <&hifiberry_dacplus>,"i2s-controller:0=",<&i2s_clk_producer>;
|
|
+
|
|
leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
|
|
mute_ext_ctl = <&hifiberry_dacplus>,"hifiberry-dacplus,mute_ext_ctl:0";
|
|
auto_mute = <&hifiberry_dacplus>,"hifiberry-dacplus,auto_mute?";
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-amp3-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-amp3-overlay.dts
|
|
@@ -10,7 +10,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -50,7 +50,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "hifiberry,hifiberry-amp3";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -27,7 +27,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "hifiberry,hifiberry-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
|
|
@@ -15,8 +15,8 @@
|
|
};
|
|
};
|
|
|
|
- fragment@1 {
|
|
- target = <&i2s>;
|
|
+ frag1: fragment@1 {
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -51,7 +51,7 @@
|
|
target = <&sound>;
|
|
hifiberry_dacplus: __overlay__ {
|
|
compatible = "hifiberry,hifiberry-dacplus";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
@@ -59,7 +59,10 @@
|
|
__overrides__ {
|
|
24db_digital_gain =
|
|
<&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
|
|
- slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
|
|
+ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?",
|
|
+ <&frag1>,"target:0=",<&i2s_clk_producer>,
|
|
+ <&hifiberry_dacplus>,"i2s-controller:0=",<&i2s_clk_producer>;
|
|
+
|
|
leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
|
|
@@ -15,8 +15,8 @@
|
|
};
|
|
};
|
|
|
|
- fragment@1 {
|
|
- target = <&i2s>;
|
|
+ frag1: fragment@1 {
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -58,7 +58,7 @@
|
|
target = <&sound>;
|
|
hifiberry_dacplusadc: __overlay__ {
|
|
compatible = "hifiberry,hifiberry-dacplusadc";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
@@ -66,7 +66,9 @@
|
|
__overrides__ {
|
|
24db_digital_gain =
|
|
<&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?";
|
|
- slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?";
|
|
+ slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?",
|
|
+ <&frag1>,"target:0=",<&i2s_clk_producer>,
|
|
+ <&hifiberry_dacplusadc>,"i2s-controller:0=",<&i2s_clk_producer>;
|
|
leds_off = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,leds_off?";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
|
|
@@ -15,8 +15,8 @@
|
|
};
|
|
};
|
|
|
|
- fragment@1 {
|
|
- target = <&i2s>;
|
|
+ frag1: fragment@1 {
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -56,7 +56,7 @@
|
|
hifiberry_dacplusadcpro: __overlay__ {
|
|
compatible = "hifiberry,hifiberry-dacplusadcpro";
|
|
audio-codec = <&hb_dac &hb_adc>;
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
@@ -64,7 +64,9 @@
|
|
__overrides__ {
|
|
24db_digital_gain =
|
|
<&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?";
|
|
- slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?";
|
|
+ slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?",
|
|
+ <&frag1>,"target:0=",<&i2s_clk_producer>,
|
|
+ <&hifiberry_dacplusadcpro>,"i2s-controller:0=",<&i2s_clk_producer>;
|
|
leds_off = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,leds_off?";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -27,7 +27,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "hifiberrydacplusdsp,hifiberrydacplusdsp-soundcard";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
|
|
@@ -8,7 +8,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -84,7 +84,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "hifiberry,hifiberry-dacplushd";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
clocks = <&pll 0>;
|
|
reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -34,7 +34,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "hifiberry,hifiberry-digi";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -34,7 +34,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "hifiberry,hifiberry-digi";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
clock44-gpio = <&gpio 5 0>;
|
|
clock48-gpio = <&gpio 6 0>;
|
|
--- a/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
|
|
@@ -9,13 +9,13 @@
|
|
target = <&sound>;
|
|
frag0: __overlay__ {
|
|
compatible = "audiophonics,i-sabre-q2m";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
fragment@1 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c0-pi5-overlay.dts
|
|
@@ -0,0 +1,34 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c0>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ clock-frequency = <100000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&frag0>;
|
|
+ __overlay__ {
|
|
+ pinctrl-0 = <&rp1_i2c0_0_1>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&frag0>;
|
|
+ __dormant__ {
|
|
+ pinctrl-0 = <&rp1_i2c0_8_9>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_0_1 = <0>,"+1-2";
|
|
+ pins_8_9 = <0>,"-1+2";
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c1-pi5-overlay.dts
|
|
@@ -0,0 +1,34 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ clock-frequency = <100000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&frag0>;
|
|
+ __overlay__ {
|
|
+ pinctrl-0 = <&rp1_i2c1_2_3>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&frag0>;
|
|
+ __dormant__ {
|
|
+ pinctrl-0 = <&rp1_i2c1_10_11>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_2_3 = <0>,"+1-2";
|
|
+ pins_10_11 = <0>,"-1+2";
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c2-pi5-overlay.dts
|
|
@@ -0,0 +1,21 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c2>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ clock-frequency = <100000>;
|
|
+ pinctrl-0 = <&rp1_i2c2_4_5>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_4_5 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c2_4_5>;
|
|
+ pins_12_13 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c2_12_13>;
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c3-pi5-overlay.dts
|
|
@@ -0,0 +1,22 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c3>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ clock-frequency = <100000>;
|
|
+ pinctrl-0 = <&rp1_i2c3_6_7>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_6_7 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c3_6_7>;
|
|
+ pins_14_15 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c3_14_15>;
|
|
+ pins_22_23 = <&frag0>,"pinctrl-0:0=", <&rp1_i2c3_22_23>;
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/i2s-dac-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/i2s-dac-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -27,7 +27,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "rpi,rpi-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/imx219-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/imx219-overlay.dts
|
|
@@ -69,7 +69,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/imx258-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/imx258-overlay.dts
|
|
@@ -110,7 +110,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<®_frag>, "target:0=",<&cam0_reg>,
|
|
--- a/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
|
|
+++ b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
|
|
@@ -95,7 +95,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/imx296-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/imx296-overlay.dts
|
|
@@ -94,7 +94,7 @@
|
|
rotation = <&imx296>,"rotation:0";
|
|
orientation = <&imx296>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&imx296>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
|
|
+++ b/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
|
|
@@ -65,7 +65,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<®_frag>, "target:0=",<&cam0_reg>,
|
|
--- a/arch/arm/boot/dts/overlays/imx519-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/imx519-overlay.dts
|
|
@@ -69,7 +69,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/imx708-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/imx708-overlay.dts
|
|
@@ -79,12 +79,12 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<®_frag>, "target:0=",<&cam0_reg>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
- <&cam_node>, "VANA1-supply:0=",<&cam0_reg>,
|
|
+ <&cam_node>, "vana1-supply:0=",<&cam0_reg>,
|
|
<&vcm_node>, "VDD-supply:0=",<&cam0_reg>;
|
|
vcm = <&vcm_node>, "status",
|
|
<0>, "=4";
|
|
--- a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
iqaudio_dac: __overlay__ {
|
|
compatible = "iqaudio,iqaudio-codec";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -35,7 +35,7 @@
|
|
target = <&sound>;
|
|
frag2: __overlay__ {
|
|
compatible = "iqaudio,iqaudio-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -35,7 +35,7 @@
|
|
target = <&sound>;
|
|
iqaudio_dac: __overlay__ {
|
|
compatible = "iqaudio,iqaudio-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
mute-gpios = <&gpio 22 0>;
|
|
status = "okay";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -34,7 +34,7 @@
|
|
target = <&sound>;
|
|
wm8804_digi: __overlay__ {
|
|
compatible = "iqaudio,wm8804-digi";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/irs1125-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
|
|
@@ -82,7 +82,7 @@
|
|
|
|
__overrides__ {
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&irs1125>, "clocks:0=",<&cam0_clk>;
|
|
--- a/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
|
|
@@ -7,7 +7,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -54,7 +54,7 @@
|
|
target = <&sound>;
|
|
frag3: __overlay__ {
|
|
compatible = "justboom,justboom-both";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -35,7 +35,7 @@
|
|
target = <&sound>;
|
|
frag2: __overlay__ {
|
|
compatible = "justboom,justboom-dac";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -34,7 +34,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "justboom,justboom-digi";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/max98357a-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
|
|
@@ -12,7 +12,7 @@
|
|
|
|
/* Enable I2S */
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -52,7 +52,7 @@
|
|
simple-audio-card,name = "MAX98357A";
|
|
status = "okay";
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
simple-audio-card,codec {
|
|
sound-dai = <&max98357a_dac>;
|
|
@@ -69,7 +69,7 @@
|
|
simple-audio-card,name = "MAX98357A";
|
|
status = "okay";
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
simple-audio-card,codec {
|
|
sound-dai = <&max98357a_nsd>;
|
|
--- a/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "simple-audio-card";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
|
|
simple-audio-card,name = "mbed-DAC";
|
|
@@ -52,7 +52,7 @@
|
|
simple-audio-card,format = "i2s";
|
|
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
|
|
sound_master: simple-audio-card,codec {
|
|
--- a/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -52,7 +52,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "merus,merus-amp";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart0-pi5-overlay.dts
|
|
@@ -0,0 +1,35 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/rp1.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 100MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 100000000*38400/31250 = 122880000
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk0 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart0_pclk";
|
|
+ clock-frequency = <122880000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart0>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart1-pi5-overlay.dts
|
|
@@ -0,0 +1,35 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/rp1.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 100MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 100000000*38400/31250 = 122880000
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk1 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart1_pclk";
|
|
+ clock-frequency = <122880000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart1>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart2-pi5-overlay.dts
|
|
@@ -0,0 +1,35 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/rp1.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 100MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 100000000*38400/31250 = 122880000
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk2 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart2_pclk";
|
|
+ clock-frequency = <122880000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart2>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart3-pi5-overlay.dts
|
|
@@ -0,0 +1,35 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/rp1.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 100MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 100000000*38400/31250 = 122880000
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk3 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart3_pclk";
|
|
+ clock-frequency = <122880000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart3>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart4-pi5-overlay.dts
|
|
@@ -0,0 +1,35 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/rp1.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 100MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 100000000*38400/31250 = 122880000
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk4 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart4_pclk";
|
|
+ clock-frequency = <122880000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart4>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk &rp1_clocks RP1_PLL_SYS_PRI_PH>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/ov2311-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/ov2311-overlay.dts
|
|
@@ -60,7 +60,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/ov5647-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
|
|
@@ -72,7 +72,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<®_frag>, "target:0=",<&cam0_reg>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/ov7251-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
|
|
@@ -60,7 +60,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/ov9281-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
|
|
@@ -61,7 +61,7 @@
|
|
rotation = <&cam_node>,"rotation:0";
|
|
orientation = <&cam_node>,"orientation:0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&cam_node>, "clocks:0=",<&cam0_clk>,
|
|
--- a/arch/arm/boot/dts/overlays/overlay_map.dts
|
|
+++ b/arch/arm/boot/dts/overlays/overlay_map.dts
|
|
@@ -1,32 +1,100 @@
|
|
/dts-v1/;
|
|
|
|
/ {
|
|
+ audremap {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ balena-fin {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
bmp085_i2c-sensor {
|
|
deprecated = "use i2c-sensor,bmp085";
|
|
};
|
|
|
|
+ cm-swap-i2c0 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
cutiepi-panel {
|
|
bcm2711;
|
|
};
|
|
|
|
+ disable-bt {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "disable-bt-pi5";
|
|
+ };
|
|
+
|
|
+ disable-bt-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
disable-emmc2 {
|
|
bcm2711;
|
|
};
|
|
|
|
+ disable-wifi {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "disable-wifi-pi5";
|
|
+ };
|
|
+
|
|
+ disable-wifi-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
highperi {
|
|
bcm2711;
|
|
};
|
|
|
|
+ i2c0 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "i2c0-pi5";
|
|
+ };
|
|
+
|
|
i2c0-bcm2708 {
|
|
deprecated = "use i2c0";
|
|
};
|
|
|
|
+ i2c0-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
+ i2c1 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "i2c1-pi5";
|
|
+ };
|
|
+
|
|
i2c1-bcm2708 {
|
|
deprecated = "use i2c1";
|
|
};
|
|
|
|
+ i2c1-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
+ i2c2 {
|
|
+ bcm2712 = "i2c2-pi5";
|
|
+ };
|
|
+
|
|
+ i2c2-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
i2c3 {
|
|
bcm2711;
|
|
+ bcm2712 = "i2c3-pi5";
|
|
+ };
|
|
+
|
|
+ i2c3-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
i2c4 {
|
|
@@ -41,26 +109,76 @@
|
|
bcm2711;
|
|
};
|
|
|
|
+ i2s-gpio28-31 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
lirc-rpi {
|
|
deprecated = "use gpio-ir";
|
|
};
|
|
|
|
+ midi-uart0 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "midi-uart0-pi5";
|
|
+ };
|
|
+
|
|
+ midi-uart0-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
+ midi-uart1 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "midi-uart1-pi5";
|
|
+ };
|
|
+
|
|
+ midi-uart1-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
midi-uart2 {
|
|
bcm2711;
|
|
+ bcm2712 = "midi-uart2-pi5";
|
|
+ };
|
|
+
|
|
+ midi-uart2-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
midi-uart3 {
|
|
bcm2711;
|
|
+ bcm2712 = "midi-uart3-pi5";
|
|
+ };
|
|
+
|
|
+ midi-uart3-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
midi-uart4 {
|
|
bcm2711;
|
|
+ bcm2712 = "midi-uart4-pi5";
|
|
+ };
|
|
+
|
|
+ midi-uart4-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
midi-uart5 {
|
|
bcm2711;
|
|
};
|
|
|
|
+ miniuart-bt {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ mmc {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
mpu6050 {
|
|
deprecated = "use i2c-sensor,mpu6050";
|
|
};
|
|
@@ -118,6 +236,16 @@
|
|
deprecated = "no longer necessary";
|
|
};
|
|
|
|
+ sdhost {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ sdio {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
sdio-1bit {
|
|
deprecated = "use sdio,bus_width=1,gpios_22_25";
|
|
};
|
|
@@ -126,6 +254,21 @@
|
|
deprecated = "use 'dtparam=sd_poll_once' etc.";
|
|
};
|
|
|
|
+ smi {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ smi-dev {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ smi-nand {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
spi0-cs {
|
|
renamed = "spi0-2cs";
|
|
};
|
|
@@ -134,12 +277,42 @@
|
|
deprecated = "no longer necessary";
|
|
};
|
|
|
|
+ spi2-1cs {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "spi2-1cs-pi5";
|
|
+ };
|
|
+
|
|
+ spi2-1cs-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
+ spi2-2cs {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "spi2-2cs-pi5";
|
|
+ };
|
|
+
|
|
+ spi2-2cs-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
spi3-1cs {
|
|
bcm2711;
|
|
+ bcm2712 = "spi3-1cs-pi5";
|
|
+ };
|
|
+
|
|
+ spi3-1cs-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
spi3-2cs {
|
|
bcm2711;
|
|
+ bcm2712 = "spi3-2cs-pi5";
|
|
+ };
|
|
+
|
|
+ spi3-2cs-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
spi4-1cs {
|
|
@@ -152,10 +325,20 @@
|
|
|
|
spi5-1cs {
|
|
bcm2711;
|
|
+ bcm2712 = "spi5-1cs-pi5";
|
|
+ };
|
|
+
|
|
+ spi5-1cs-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
spi5-2cs {
|
|
bcm2711;
|
|
+ bcm2712 = "spi5-2cs-pi5";
|
|
+ };
|
|
+
|
|
+ spi5-2cs-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
spi6-1cs {
|
|
@@ -166,16 +349,51 @@
|
|
bcm2711;
|
|
};
|
|
|
|
+ uart0 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "uart0-pi5";
|
|
+ };
|
|
+
|
|
+ uart0-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
+ uart1 {
|
|
+ bcm2835;
|
|
+ bcm2711;
|
|
+ bcm2712 = "uart1-pi5";
|
|
+ };
|
|
+
|
|
+ uart1-pi5 {
|
|
+ bcm2712;
|
|
+ };
|
|
+
|
|
uart2 {
|
|
bcm2711;
|
|
+ bcm2712 = "uart2-pi5";
|
|
+ };
|
|
+
|
|
+ uart2-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
uart3 {
|
|
bcm2711;
|
|
+ bcm2712 = "uart3-pi5";
|
|
+ };
|
|
+
|
|
+ uart3-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
uart4 {
|
|
bcm2711;
|
|
+ bcm2712 = "uart4-pi5";
|
|
+ };
|
|
+
|
|
+ uart4-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
uart5 {
|
|
@@ -198,10 +416,12 @@
|
|
vc4-fkms-v3d {
|
|
bcm2835;
|
|
bcm2711 = "vc4-fkms-v3d-pi4";
|
|
+ bcm2712 = "vc4-fkms-v3d-pi4";
|
|
};
|
|
|
|
vc4-fkms-v3d-pi4 {
|
|
bcm2711;
|
|
+ bcm2712;
|
|
};
|
|
|
|
vc4-kms-dpi-at056tn53v1 {
|
|
@@ -211,10 +431,16 @@
|
|
vc4-kms-v3d {
|
|
bcm2835;
|
|
bcm2711 = "vc4-kms-v3d-pi4";
|
|
+ bcm2712 = "vc4-kms-v3d-pi5";
|
|
};
|
|
|
|
vc4-kms-v3d-pi4 {
|
|
bcm2711;
|
|
+ bcm2712 = "vc4-kms-v3d-pi5";
|
|
+ };
|
|
+
|
|
+ vc4-kms-v3d-pi5 {
|
|
+ bcm2712;
|
|
};
|
|
|
|
vl805 {
|
|
--- a/arch/arm/boot/dts/overlays/pibell-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
|
|
@@ -24,7 +24,7 @@
|
|
};
|
|
|
|
fragment@1 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
@@ -43,7 +43,7 @@
|
|
format = "i2s";
|
|
|
|
r_cpu_dai: cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
|
|
/* example TDM slot configuration
|
|
dai-tdm-slot-num = <2>;
|
|
@@ -60,7 +60,7 @@
|
|
format = "i2s";
|
|
|
|
p_cpu_dai: cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
|
|
/* example TDM slot configuration
|
|
dai-tdm-slot-num = <2>;
|
|
--- a/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -42,7 +42,7 @@
|
|
pifi_40: __overlay__ {
|
|
compatible = "pifi,pifi-40";
|
|
audio-codec = <&tas5711l &tas5711r>;
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
pdn-gpios = <&gpio 23 1>;
|
|
status = "okay";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -38,7 +38,7 @@
|
|
simple-audio-card,dai-link@1 {
|
|
format = "i2s";
|
|
cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
codec {
|
|
sound-dai = <&pcm5142>;
|
|
--- a/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
|
|
@@ -16,7 +16,7 @@
|
|
format = "i2s";
|
|
|
|
cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
dai-tdm-slot-num = <2>;
|
|
dai-tdm-slot-width = <32>;
|
|
};
|
|
@@ -40,7 +40,7 @@
|
|
};
|
|
|
|
fragment@2 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
--- a/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -34,7 +34,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "pifi,pifi-mini-210";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
|
|
status = "okay";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/pisound-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
|
|
@@ -75,7 +75,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "blokaslabs,pisound";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
@@ -108,7 +108,7 @@
|
|
};
|
|
|
|
fragment@7 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/proto-codec-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/proto-codec-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -32,7 +32,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "rpi,rpi-proto";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -42,7 +42,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "rra,digidac1-soundcard";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-1cs-pi5-overlay.dts
|
|
@@ -0,0 +1,33 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ cs-gpios = <&gpio 0 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-2cs-pi5-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev2_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ cs1_spidev = <&spidev2_1>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi3-1cs-pi5-overlay.dts
|
|
@@ -0,0 +1,33 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi3>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ cs-gpios = <&gpio 4 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev3_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev3_0>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi3-2cs-pi5-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi3>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev3_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev3_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev3_0>,"status";
|
|
+ cs1_spidev = <&spidev3_1>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi5-1cs-pi5-overlay.dts
|
|
@@ -0,0 +1,33 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi5>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ cs-gpios = <&gpio 12 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev5_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev5_0>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi5-2cs-pi5-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi5>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev5_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev5_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev5_0>,"status";
|
|
+ cs1_spidev = <&spidev5_1>,"status";
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
target = <&sound>;
|
|
__overlay__ {
|
|
compatible = "simple-audio-card";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_consumer>;
|
|
status = "okay";
|
|
|
|
simple-audio-card,name = "SuperAudioBoard";
|
|
@@ -32,7 +32,7 @@
|
|
simple-audio-card,frame-master = <&sound_master>;
|
|
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_consumer>;
|
|
dai-tdm-slot-num = <2>;
|
|
dai-tdm-slot-width = <32>;
|
|
};
|
|
@@ -45,7 +45,7 @@
|
|
};
|
|
|
|
fragment@1 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
|
|
@@ -8,7 +8,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -31,16 +31,16 @@
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,format = "i2s";
|
|
simple-audio-card,name = "tc358743";
|
|
- simple-audio-card,bitclock-master = <&dailink0_slave>;
|
|
- simple-audio-card,frame-master = <&dailink0_slave>;
|
|
+ simple-audio-card,bitclock-master = <&dailink0_master>;
|
|
+ simple-audio-card,frame-master = <&dailink0_master>;
|
|
status = "okay";
|
|
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_consumer>;
|
|
dai-tdm-slot-num = <2>;
|
|
dai-tdm-slot-width = <32>;
|
|
};
|
|
- dailink0_slave: simple-audio-card,codec {
|
|
+ dailink0_master: simple-audio-card,codec {
|
|
sound-dai = <&tc358743_codec>;
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/tc358743-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
|
|
@@ -101,7 +101,7 @@
|
|
4lane = <0>, "-2+3-7+8";
|
|
link-frequency = <&tc358743_0>,"link-frequencies#0";
|
|
media-controller = <&csi>,"brcm,media-controller?";
|
|
- cam0 = <&i2c_frag>, "target:0=",<&i2c_vc>,
|
|
+ cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
<&csi_frag>, "target:0=",<&csi0>,
|
|
<&clk_frag>, "target:0=",<&cam0_clk>,
|
|
<&tc358743>, "clocks:0=",<&cam0_clk>;
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart0-pi5-overlay.dts
|
|
@@ -0,0 +1,17 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart0>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <&frag0>,"pinctrl-0:4=",<&uart0_ctsrts_pins>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart1-pi5-overlay.dts
|
|
@@ -0,0 +1,17 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart1>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <&frag0>,"pinctrl-0:4=",<&uart1_ctsrts_pins>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart2-pi5-overlay.dts
|
|
@@ -0,0 +1,17 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart2>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <&frag0>,"pinctrl-0:4=",<&uart2_ctsrts_pins>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart3-pi5-overlay.dts
|
|
@@ -0,0 +1,17 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart3>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <&frag0>,"pinctrl-0:4=",<&uart3_ctsrts_pins>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart4-pi5-overlay.dts
|
|
@@ -0,0 +1,17 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart4>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <&frag0>,"pinctrl-0:4=",<&uart4_ctsrts_pins>;
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/udrc-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
/ {
|
|
compatible = "brcm,bcm2835";
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
clocks = <&clocks BCM2835_CLOCK_PCM>;
|
|
clock-names = "pcm";
|
|
@@ -71,7 +71,7 @@
|
|
target = <&sound>;
|
|
snd: __overlay__ {
|
|
compatible = "simple-audio-card";
|
|
- i2s-controller = <&i2s>;
|
|
+ i2s-controller = <&i2s_clk_producer>;
|
|
status = "okay";
|
|
|
|
simple-audio-card,name = "udrc";
|
|
@@ -93,7 +93,7 @@
|
|
"Line Out", "LOL";
|
|
|
|
dailink0_master: simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
|
|
simple-audio-card,codec {
|
|
--- a/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_consumer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -29,14 +29,14 @@
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,format = "i2s";
|
|
simple-audio-card,name = "dabboard";
|
|
- simple-audio-card,bitclock-master = <&dailink0_slave>;
|
|
- simple-audio-card,frame-master = <&dailink0_slave>;
|
|
+ simple-audio-card,bitclock-master = <&dailink0_master>;
|
|
+ simple-audio-card,frame-master = <&dailink0_master>;
|
|
simple-audio-card,widgets = "Microphone", "Microphone Jack";
|
|
status = "okay";
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_consumer>;
|
|
};
|
|
- dailink0_slave: simple-audio-card,codec {
|
|
+ dailink0_master: simple-audio-card,codec {
|
|
#sound-dai-cells = <0>;
|
|
sound-dai = <&dmic_codec>;
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
|
|
@@ -37,4 +37,10 @@
|
|
status = "okay";
|
|
};
|
|
};
|
|
+ fragment@5 {
|
|
+ target-path = "/chosen";
|
|
+ __overlay__ {
|
|
+ bootargs = "clk_ignore_unused";
|
|
+ };
|
|
+ };
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
|
|
@@ -41,4 +41,10 @@
|
|
status = "okay";
|
|
};
|
|
};
|
|
+ fragment@5 {
|
|
+ target-path = "/chosen";
|
|
+ __overlay__ {
|
|
+ bootargs = "clk_ignore_unused";
|
|
+ };
|
|
+ };
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
|
|
@@ -11,7 +11,7 @@
|
|
/ {
|
|
/* No compatible as it will have come from edt-ft5406.dtsi */
|
|
|
|
- fragment@0 {
|
|
+ dsi_frag: fragment@0 {
|
|
target = <&dsi1>;
|
|
__overlay__ {
|
|
#address-cells = <1>;
|
|
@@ -51,8 +51,8 @@
|
|
fragment@1 {
|
|
target-path = "/";
|
|
__overlay__ {
|
|
- panel_disp1: panel_disp1@0 {
|
|
- reg = <0>;
|
|
+ panel_disp: panel_disp@1 {
|
|
+ reg = <1>;
|
|
compatible = "raspberrypi,7inch-dsi", "simple-panel";
|
|
backlight = <®_display>;
|
|
power-supply = <®_display>;
|
|
@@ -64,8 +64,8 @@
|
|
};
|
|
};
|
|
|
|
- reg_bridge: reg_bridge@0 {
|
|
- reg = <0>;
|
|
+ reg_bridge: reg_bridge@1 {
|
|
+ reg = <1>;
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "bridge_reg";
|
|
gpio = <®_display 0 0>;
|
|
@@ -75,7 +75,7 @@
|
|
};
|
|
};
|
|
|
|
- fragment@2 {
|
|
+ i2c_frag: fragment@2 {
|
|
target = <&i2c_csi_dsi>;
|
|
__overlay__ {
|
|
#address-cells = <1>;
|
|
@@ -113,6 +113,12 @@
|
|
};
|
|
|
|
__overrides__ {
|
|
- disable_touch = <0>, "-10-11-12";
|
|
+ dsi0 = <&dsi_frag>, "target:0=",<&dsi0>,
|
|
+ <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
+ <&ts_i2c_frag>, "target:0=",<&i2c_csi_dsi0>,
|
|
+ <&panel_disp>, "reg:0=0",
|
|
+ <®_bridge>, "reg:0=0",
|
|
+ <®_bridge>, "regulator-name=bridge_reg_0";
|
|
+ disable_touch = <&ft5406>, "status=disabled";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-waveshare-panel-overlay.dts
|
|
@@ -9,7 +9,7 @@
|
|
/ {
|
|
compatible = "brcm,bcm2835";
|
|
|
|
- fragment@0 {
|
|
+ dsi_frag: fragment@0 {
|
|
target = <&dsi1>;
|
|
__overlay__ {
|
|
#address-cells = <1>;
|
|
@@ -29,7 +29,7 @@
|
|
};
|
|
};
|
|
|
|
- frag2: fragment@2 {
|
|
+ i2c_frag: fragment@2 {
|
|
target = <&i2c_csi_dsi>;
|
|
__overlay__ {
|
|
#address-cells = <1>;
|
|
@@ -112,12 +112,14 @@
|
|
<&touch>, "touchscreen-size-y:0=1480",
|
|
<&touch>, "touchscreen-inverted-x?",
|
|
<&touch>, "touchscreen-swapped-x-y?";
|
|
- i2c1 = <&frag2>, "target:0=",<&i2c1>,
|
|
+ i2c1 = <&i2c_frag>, "target:0=",<&i2c1>,
|
|
<0>, "-3-4+5";
|
|
disable_touch = <&touch>, "status=disabled";
|
|
rotation = <&panel>, "rotation:0";
|
|
invx = <&touch>,"touchscreen-inverted-x?";
|
|
invy = <&touch>,"touchscreen-inverted-y?";
|
|
swapxy = <&touch>,"touchscreen-swapped-x-y?";
|
|
+ dsi0 = <&dsi_frag>, "target:0=",<&dsi0>,
|
|
+ <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>;
|
|
};
|
|
};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi5-overlay.dts
|
|
@@ -0,0 +1,147 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+
|
|
+#include "cma-overlay.dts"
|
|
+
|
|
+&frag0 {
|
|
+ size = <((320-4)*1024*1024)>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2712";
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aon_intr>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&ddc0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&ddc1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&hdmi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&hdmi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&hvs>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&mop>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&moplet>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&pixelvalve0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&pixelvalve1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&v3d>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&vec>;
|
|
+ frag13: __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&hdmi0>;
|
|
+ __dormant__ {
|
|
+ dmas;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&hdmi1>;
|
|
+ __dormant__ {
|
|
+ dmas;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@16 {
|
|
+ target = <&disp_intr>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@17 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ /* IOMMU attaches here, where we allocate DMA buffers */
|
|
+ iommus = <&iommu4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ audio = <0>,"!14";
|
|
+ audio1 = <0>,"!15";
|
|
+ noaudio = <0>,"=14", <0>,"=15";
|
|
+ composite = <0>, "!3",
|
|
+ <0>, "!4",
|
|
+ <0>, "!5",
|
|
+ <0>, "!6",
|
|
+ <0>, "!10",
|
|
+ <0>, "!11",
|
|
+ <&frag13>, "status";
|
|
+ nohdmi0 = <0>, "-3-5-10";
|
|
+ nohdmi1 = <0>, "-4-6-11";
|
|
+ nohdmi = <0>, "-3-4-5-6-10-11";
|
|
+ };
|
|
+};
|
|
--- a/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
|
|
@@ -94,7 +94,14 @@
|
|
};
|
|
};
|
|
|
|
+ fragment@5 {
|
|
+ target = <&i2c_vc>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
__overrides__ {
|
|
- ddc = <0>,"=2", <0>,"=3", <0>,"=4";
|
|
+ ddc = <0>,"=2", <0>,"=3", <0>,"=4", <0>,"=5";
|
|
};
|
|
};
|
|
--- a/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
|
|
+++ b/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
|
|
@@ -6,7 +6,7 @@
|
|
compatible = "brcm,bcm2835";
|
|
|
|
fragment@0 {
|
|
- target = <&i2s>;
|
|
+ target = <&i2s_clk_producer>;
|
|
__overlay__ {
|
|
status = "okay";
|
|
};
|
|
@@ -65,7 +65,7 @@
|
|
"RINPUT2", "Mic Jack";
|
|
|
|
simple-audio-card,cpu {
|
|
- sound-dai = <&i2s>;
|
|
+ sound-dai = <&i2s_clk_producer>;
|
|
};
|
|
dailink0_slave: simple-audio-card,codec {
|
|
sound-dai = <&wm8960>;
|
|
--- a/arch/arm64/boot/dts/broadcom/Makefile
|
|
+++ b/arch/arm64/boot/dts/broadcom/Makefile
|
|
@@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rp
|
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
|
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
|
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4s.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2712-rpi-5-b.dtb
|
|
|
|
subdir-y += bcmbca
|
|
subdir-y += northstar2
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
|
|
@@ -0,0 +1,2 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+#include "arm/broadcom/bcm2712-rpi-5-b.dts"
|