Jonathan A. Kollasch f36990eae7 ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender
This replaces the register bits for RGMII delay on the MAC side in favor
of having the RGMII delay on the PHY side by setting the phy-mode
property to rgmii-id (RGMII internal delay), which is supported by the
at803x driver.  Speed 1000 is fixed as a result, so now all ethernet
speeds function.

Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Michael Pratt <mcpratt@pm.me>
2021-06-07 00:25:11 +02:00
..
2021-06-06 00:25:25 +02:00
2021-06-06 00:24:07 +02:00
2021-04-10 19:28:04 +02:00
2021-04-10 19:28:04 +02:00