mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 06:08:08 +00:00
7181eb9f81
Remove upstreamed patches: - 000-v5.18-01-dt-bindings-reset-add-dt-binding-header-for-Mediatek.patch - 000-v5.18-02-staging-mt7621-dts-align-resets-with-binding-documen.patch - 001-v5.18-01-dt-bindings-clock-mediatek-mt7621-sysc-add-reset-cel.patch - 001-v5.18-02-clk-ralink-make-system-controller-node-a-reset-provi.patch - 002-v6.0-MIPS-ralink-mt7621-avoid-to-init-common-ralink-reset.patch - 100-v5.16-PCI-mt7621-Add-MediaTek-MT7621-PCIe-host-controller-.patch - 101-v5.17-PCI-mt7621-Rename-mt7621_pci_-to-mt7621_pcie_.patch - 102-v5.17-PCI-mt7621-Declare-mt7621_pci_ops-static.patch - 103-v5.17-PCI-mt7621-Move-MIPS-setup-to-pcibios_root_bridge_pr.patch - 104-v5.17-PCI-mt7621-Drop-of_match_ptr-to-avoid-unused-variabl.patch - 105-v5.17-PCI-mt7621-Remove-unused-function-pcie_rmw.patch - 106-v5.17-PCI-Let-pcibios_root_bridge_prepare-access-bridge-wi.patch - 107-v6.2-PCI-mt7621-Add-sentinel-to-quirks-table.patch - 108-v6.3-PCI-mt7621-Delay-phy-ports-initialization.patch Manually refresh: - 006-v6.5-mips-ralink-introduce-commonly-used-remap-node-funct.patch - 320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch - 405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch - 410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch - 805-pinctrl-AW9523.patch - 825-i2c-MIPS-adds-ralink-I2C-driver.patch - 830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch Automatically refresh: - 200-add-ralink-eth.patch - 314-MIPS-add-bootargs-override-property.patch - 315-owrt-hack-fix-mt7688-cache-issue.patch - 700-net-ethernet-mediatek-support-net-labels.patch - 720-Revert-net-phy-simplify-phy_link_change-arguments.patch - 721-NET-no-auto-carrier-off-support.patch - 800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch - 802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch - 810-uvc-add-iPassion-iP2970-support.patch - 821-SPI-ralink-add-Ralink-SoC-spi-driver.patch - 835-asoc-add-mt7620-support.patch - 840-serial-add-ugly-custom-baud-rate-hack.patch - 845-pwm-add-mediatek-support.patch - 850-awake-rt305x-dwc2-controller.patch Tested-by: Andre Heider <a.heider@gmail.com> # netgear,wac124 Tested-by: Andrey Jr. Melnikov <temnota.am@gmail.com> # Xiaomi Mi Router 3G Tested-by: Timo Dorfner <timo.capa@gmail.com> # mt7621/mir3g mt7621/rm2100 Reviewed-by: Shiji Yang <yangshiji66@qq.com> Co-Developed-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Signed-off-by: Nick Hainke <vincent@systemli.org>
242 lines
6.0 KiB
Diff
242 lines
6.0 KiB
Diff
From fc8f96309c21c1bc3276427309cd7d361347d66e Mon Sep 17 00:00:00 2001
|
|
From: John Crispin <blogic@openwrt.org>
|
|
Date: Mon, 7 Dec 2015 17:16:50 +0100
|
|
Subject: [PATCH 52/53] pwm: add mediatek support
|
|
|
|
Signed-off-by: John Crispin <blogic@openwrt.org>
|
|
---
|
|
drivers/pwm/Kconfig | 9 +++
|
|
drivers/pwm/Makefile | 1 +
|
|
drivers/pwm/pwm-mediatek.c | 173 ++++++++++++++++++++++++++++++++++++++++++++
|
|
3 files changed, 183 insertions(+)
|
|
create mode 100644 drivers/pwm/pwm-mediatek.c
|
|
|
|
--- a/drivers/pwm/Kconfig
|
|
+++ b/drivers/pwm/Kconfig
|
|
@@ -393,6 +393,15 @@ config PWM_MEDIATEK
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called pwm-mediatek.
|
|
|
|
+config PWM_MEDIATEK_RAMIPS
|
|
+ tristate "Mediatek PWM support"
|
|
+ depends on RALINK && OF
|
|
+ help
|
|
+ Generic PWM framework driver for Mediatek ARM SoC.
|
|
+
|
|
+ To compile this driver as a module, choose M here: the module
|
|
+ will be called pwm-mxs.
|
|
+
|
|
config PWM_MXS
|
|
tristate "Freescale MXS PWM support"
|
|
depends on ARCH_MXS || COMPILE_TEST
|
|
--- a/drivers/pwm/Makefile
|
|
+++ b/drivers/pwm/Makefile
|
|
@@ -34,6 +34,7 @@ obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-p
|
|
obj-$(CONFIG_PWM_LPSS_PLATFORM) += pwm-lpss-platform.o
|
|
obj-$(CONFIG_PWM_MESON) += pwm-meson.o
|
|
obj-$(CONFIG_PWM_MEDIATEK) += pwm-mediatek.o
|
|
+obj-$(CONFIG_PWM_MEDIATEK_RAMIPS) += pwm-mediatek-ramips.o
|
|
obj-$(CONFIG_PWM_MTK_DISP) += pwm-mtk-disp.o
|
|
obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
|
|
obj-$(CONFIG_PWM_NTXEC) += pwm-ntxec.o
|
|
--- /dev/null
|
|
+++ b/drivers/pwm/pwm-mediatek-ramips.c
|
|
@@ -0,0 +1,197 @@
|
|
+/*
|
|
+ * Mediatek Pulse Width Modulator driver
|
|
+ *
|
|
+ * Copyright (C) 2015 John Crispin <blogic@openwrt.org>
|
|
+ *
|
|
+ * This file is licensed under the terms of the GNU General Public
|
|
+ * License version 2. This program is licensed "as is" without any
|
|
+ * warranty of any kind, whether express or implied.
|
|
+ */
|
|
+
|
|
+#include <linux/err.h>
|
|
+#include <linux/io.h>
|
|
+#include <linux/ioport.h>
|
|
+#include <linux/kernel.h>
|
|
+#include <linux/module.h>
|
|
+#include <linux/of.h>
|
|
+#include <linux/platform_device.h>
|
|
+#include <linux/pwm.h>
|
|
+#include <linux/slab.h>
|
|
+#include <linux/types.h>
|
|
+
|
|
+#define NUM_PWM 4
|
|
+
|
|
+/* PWM registers and bits definitions */
|
|
+#define PWMCON 0x00
|
|
+#define PWMHDUR 0x04
|
|
+#define PWMLDUR 0x08
|
|
+#define PWMGDUR 0x0c
|
|
+#define PWMWAVENUM 0x28
|
|
+#define PWMDWIDTH 0x2c
|
|
+#define PWMTHRES 0x30
|
|
+
|
|
+/**
|
|
+ * struct mtk_pwm_chip - struct representing pwm chip
|
|
+ *
|
|
+ * @mmio_base: base address of pwm chip
|
|
+ * @chip: linux pwm chip representation
|
|
+ */
|
|
+struct mtk_pwm_chip {
|
|
+ void __iomem *mmio_base;
|
|
+ struct pwm_chip chip;
|
|
+};
|
|
+
|
|
+static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
|
|
+{
|
|
+ return container_of(chip, struct mtk_pwm_chip, chip);
|
|
+}
|
|
+
|
|
+static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
|
|
+ unsigned long offset)
|
|
+{
|
|
+ return ioread32(chip->mmio_base + 0x10 + (num * 0x40) + offset);
|
|
+}
|
|
+
|
|
+static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
|
|
+ unsigned int num, unsigned long offset,
|
|
+ unsigned long val)
|
|
+{
|
|
+ iowrite32(val, chip->mmio_base + 0x10 + (num * 0x40) + offset);
|
|
+}
|
|
+
|
|
+static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
|
|
+ int duty_ns, int period_ns)
|
|
+{
|
|
+ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
|
|
+ u32 resolution = 100 / 4;
|
|
+ u32 clkdiv = 0;
|
|
+
|
|
+ while (period_ns / resolution > 8191) {
|
|
+ clkdiv++;
|
|
+ resolution *= 2;
|
|
+ }
|
|
+
|
|
+ if (clkdiv > 7)
|
|
+ return -1;
|
|
+
|
|
+ mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | BIT(3) | clkdiv);
|
|
+ mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
|
|
+ mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
|
|
+{
|
|
+ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
|
|
+ u32 val;
|
|
+
|
|
+ val = ioread32(pc->mmio_base);
|
|
+ val |= BIT(pwm->hwpwm);
|
|
+ iowrite32(val, pc->mmio_base);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
|
|
+{
|
|
+ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip);
|
|
+ u32 val;
|
|
+
|
|
+ val = ioread32(pc->mmio_base);
|
|
+ val &= ~BIT(pwm->hwpwm);
|
|
+ iowrite32(val, pc->mmio_base);
|
|
+}
|
|
+
|
|
+static int mtk_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
|
|
+ const struct pwm_state *state)
|
|
+{
|
|
+ int err;
|
|
+ bool enabled = pwm->state.enabled;
|
|
+
|
|
+ if (!state->enabled) {
|
|
+ if (enabled)
|
|
+ mtk_pwm_disable(chip, pwm);
|
|
+
|
|
+ return 0;
|
|
+ }
|
|
+
|
|
+ err = mtk_pwm_config(pwm->chip, pwm,
|
|
+ state->duty_cycle, state->period);
|
|
+ if (err)
|
|
+ return err;
|
|
+
|
|
+ if (!enabled)
|
|
+ err = mtk_pwm_enable(chip, pwm);
|
|
+
|
|
+ return err;
|
|
+}
|
|
+
|
|
+static const struct pwm_ops mtk_pwm_ops = {
|
|
+ .apply = mtk_pwm_apply,
|
|
+ .owner = THIS_MODULE,
|
|
+};
|
|
+
|
|
+static int mtk_pwm_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct mtk_pwm_chip *pc;
|
|
+ struct resource *r;
|
|
+ int ret;
|
|
+
|
|
+ pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
|
|
+ if (!pc)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
+ pc->mmio_base = devm_ioremap_resource(&pdev->dev, r);
|
|
+ if (IS_ERR(pc->mmio_base))
|
|
+ return PTR_ERR(pc->mmio_base);
|
|
+
|
|
+ platform_set_drvdata(pdev, pc);
|
|
+
|
|
+ pc->chip.dev = &pdev->dev;
|
|
+ pc->chip.ops = &mtk_pwm_ops;
|
|
+ pc->chip.base = -1;
|
|
+ pc->chip.npwm = NUM_PWM;
|
|
+
|
|
+ ret = pwmchip_add(&pc->chip);
|
|
+ if (ret < 0)
|
|
+ dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int mtk_pwm_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct mtk_pwm_chip *pc = platform_get_drvdata(pdev);
|
|
+ int i;
|
|
+
|
|
+ for (i = 0; i < NUM_PWM; i++)
|
|
+ pwm_disable(&pc->chip.pwms[i]);
|
|
+
|
|
+ pwmchip_remove(&pc->chip);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct of_device_id mtk_pwm_of_match[] = {
|
|
+ { .compatible = "mediatek,mt7628-pwm" },
|
|
+ { }
|
|
+};
|
|
+
|
|
+MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
|
|
+
|
|
+static struct platform_driver mtk_pwm_driver = {
|
|
+ .driver = {
|
|
+ .name = "mtk-pwm",
|
|
+ .owner = THIS_MODULE,
|
|
+ .of_match_table = mtk_pwm_of_match,
|
|
+ },
|
|
+ .probe = mtk_pwm_probe,
|
|
+ .remove = mtk_pwm_remove,
|
|
+};
|
|
+
|
|
+module_platform_driver(mtk_pwm_driver);
|
|
+
|
|
+MODULE_LICENSE("GPL");
|
|
+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
|
+MODULE_ALIAS("platform:mtk-pwm");
|