openwrt/target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch
Daniel Golle 81db307748
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generic: net: phy: realtek: work-around hang on SerDes setup
On some but not all devices using the RTL8221B 2.5GBit/s PHY the SerDes
setup sequence may hang under some circumstances (eg. <2500M link
partner present during boot).

RTL8221B-VB-CG 2.5Gbps PHY (C45) mdio-bus:01: rtl822xb_config_init failed: -110

Work-around the issue by performing a hardware reset and subsequent
retry of the SerDes setup, which seems to always succeed.

Doing this requires moving ALDPS setup to config_init (which is anyway
the better place for that) as it otherwise doesn't survive the reset.

Also disable listening on MDIO address 0 which may be used by other PHYs
despite being spec'ed as "broadcast address", as bus activity on address
0 may otherwise confuse the RealTek PHY for good reasons.

Tested-by: Luis Mita <luis@luismita.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit c87a767801ef375feadb0a5c41d5a674ad3a7d2c)
Link: https://github.com/openwrt/openwrt/pull/17790
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-01-31 21:38:34 +01:00

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1.0 KiB
Diff

From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 Jan 2025 05:38:31 +0000
Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
RealTek's PHYs by default also listen on MDIO address 0 which is defined
as broadcast address. This can lead to problems if there is an actual PHY
(such as MT7981 built-in PHY) present at this address, as accessing that
PHY may then confuse the RealTek PHY.
Disabled listening on the MDIO broadcast address to avoid such problems.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
phydev->host_interfaces) ||
phydev->interface == PHY_INTERFACE_MODE_SGMII;
+ /* disable listening on MDIO broadcast address (0) */
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, 0xa430, BIT(13));
+ if (ret < 0)
+ return ret;
+
/* fill in possible interfaces */
__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
has_2500);