mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-18 21:28:02 +00:00
5f307b29cd
Add a set of upstream patches for the imx8m{m,n,p} based Venice
boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/15736
Signed-off-by: Robert Marko <robimarko@gmail.com>
40 lines
1.1 KiB
Diff
40 lines
1.1 KiB
Diff
From 9095a68c0b7084a7819e697ef38d0c987531c8ab Mon Sep 17 00:00:00 2001
|
|
From: Tim Harvey <tharvey@gateworks.com>
|
|
Date: Wed, 29 Nov 2023 17:11:51 -0800
|
|
Subject: [PATCH 406/413] 6.9: arm64: dts: imx8mp-venice-gw71xx: add TPM device
|
|
|
|
Add the TPM device found on the GW71xx revision E PCB.
|
|
|
|
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
|
|
---
|
|
.../arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi | 10 +++++++++-
|
|
1 file changed, 9 insertions(+), 1 deletion(-)
|
|
|
|
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
|
|
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
|
|
@@ -48,8 +48,15 @@
|
|
&ecspi2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spi2>;
|
|
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
|
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
|
|
+ <&gpio1 10 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
+
|
|
+ tpm@1 {
|
|
+ compatible = "tcg,tpm_tis-spi";
|
|
+ reg = <0x1>;
|
|
+ spi-max-frequency = <36000000>;
|
|
+ };
|
|
};
|
|
|
|
&gpio4 {
|
|
@@ -217,6 +224,7 @@
|
|
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
|
|
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
|
|
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
|
+ MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
|
|
>;
|
|
};
|
|
|