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https://github.com/openwrt/openwrt.git
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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
115 lines
3.7 KiB
Diff
115 lines
3.7 KiB
Diff
From 80c57b7437fb6f55b879f921f3118a2deb0c15a8 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 12 Mar 2024 10:16:58 +0000
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Subject: [PATCH 0961/1085] ARM: dts: Set all RPi PWM clocks to 50MHz
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With the RP1 PWM configured to use the 50MHz oscillator clock source,
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requesting a 100MHz clock will fail. Set the RP1 PWM clock rate to
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50MHz, do the same to other Pi PWM blocks, and remove the default
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clock override in the PWM overlays. However, an explicit
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"clock=..." parameter is still supported.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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arch/arm/boot/dts/broadcom/bcm2711.dtsi | 2 +-
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arch/arm/boot/dts/broadcom/bcm2712.dtsi | 4 ++--
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arch/arm/boot/dts/broadcom/bcm283x.dtsi | 2 +-
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arch/arm/boot/dts/broadcom/rp1.dtsi | 4 ++--
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arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts | 1 -
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arch/arm/boot/dts/overlays/pwm-overlay.dts | 1 -
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arch/arm/boot/dts/overlays/pwm1-overlay.dts | 1 -
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7 files changed, 6 insertions(+), 9 deletions(-)
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--- a/arch/arm/boot/dts/broadcom/bcm2711.dtsi
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+++ b/arch/arm/boot/dts/broadcom/bcm2711.dtsi
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@@ -277,7 +277,7 @@
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reg = <0x7e20c800 0x28>;
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clocks = <&clocks BCM2835_CLOCK_PWM>;
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assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
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- assigned-clock-rates = <10000000>;
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+ assigned-clock-rates = <50000000>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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--- a/arch/arm/boot/dts/broadcom/bcm2712.dtsi
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+++ b/arch/arm/boot/dts/broadcom/bcm2712.dtsi
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@@ -345,7 +345,7 @@
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pwm0: pwm@7d00c000 {
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compatible = "brcm,bcm2835-pwm";
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reg = <0x7d00c000 0x28>;
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- assigned-clock-rates = <10000000>;
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+ assigned-clock-rates = <50000000>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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@@ -353,7 +353,7 @@
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pwm1: pwm@7d00c800 {
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compatible = "brcm,bcm2835-pwm";
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reg = <0x7d00c800 0x28>;
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- assigned-clock-rates = <10000000>;
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+ assigned-clock-rates = <50000000>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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--- a/arch/arm/boot/dts/broadcom/bcm283x.dtsi
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+++ b/arch/arm/boot/dts/broadcom/bcm283x.dtsi
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@@ -415,7 +415,7 @@
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reg = <0x7e20c000 0x28>;
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clocks = <&clocks BCM2835_CLOCK_PWM>;
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assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
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- assigned-clock-rates = <10000000>;
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+ assigned-clock-rates = <50000000>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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--- a/arch/arm/boot/dts/broadcom/rp1.dtsi
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+++ b/arch/arm/boot/dts/broadcom/rp1.dtsi
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@@ -376,7 +376,7 @@
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#pwm-cells = <3>;
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clocks = <&rp1_clocks RP1_CLK_PWM0>;
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assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>;
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- assigned-clock-rates = <6144000>;
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+ assigned-clock-rates = <50000000>;
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status = "disabled";
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};
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@@ -386,7 +386,7 @@
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#pwm-cells = <3>;
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clocks = <&rp1_clocks RP1_CLK_PWM1>;
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assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>;
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- assigned-clock-rates = <6144000>;
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+ assigned-clock-rates = <50000000>;
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status = "disabled";
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};
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--- a/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
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@@ -34,7 +34,6 @@ N.B.:
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frag1: __overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm_pins>;
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- assigned-clock-rates = <100000000>;
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status = "okay";
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};
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};
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--- a/arch/arm/boot/dts/overlays/pwm-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
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@@ -32,7 +32,6 @@ N.B.:
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frag1: __overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm_pins>;
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- assigned-clock-rates = <100000000>;
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status = "okay";
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};
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};
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--- a/arch/arm/boot/dts/overlays/pwm1-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/pwm1-overlay.dts
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@@ -42,7 +42,6 @@
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target = <&pwm1>;
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pwm: __overlay__ {
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status = "okay";
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- assigned-clock-rates = <100000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins>;
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};
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