#include "rt3050.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "jcg,jhr-n926r", "ralink,rt3052-soc";
	model = "JCG JHR-N926R";

	aliases {
		led-boot = &led_system;
		led-failsafe = &led_system;
		led-running = &led_system;
		led-upgrade = &led_system;
	};

	flash@1f000000 {
		compatible = "cfi-flash";
		reg = <0x1f000000 0x800000>;
		bank-width = <2>;
		device-width = <2>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0x3b0000>;
			};
		};
	};

	leds {
		compatible = "gpio-leds";

		wlan1 {
			label = "red:wlan";
			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
		};

		wlan2 {
			label = "yellow:wlan";
			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
		};

		wlan3 {
			label = "green:wlan";
			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
		};

		led_system: system {
			label = "blue:system";
			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
		};
	};

	gpio_export {
		compatible = "gpio-export";
		#size-cells = <0>;

		display_data {
			gpio-export,name = "display_data";
			gpio-export,output = <1>;
			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		};

		display_clock {
			gpio-export,name = "display_clock";
			gpio-export,output = <1>;
			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
		};

		display_blank {
			gpio-export,name = "display_blank";
			gpio-export,output = <1>;
			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
		};
	};

	keys {
		compatible = "gpio-keys-polled";
		poll-interval = <20>;

		reset_wps {
			label = "reset_wps";
			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wlan {
			label = "wlan";
			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};
	};
};

&state_default {
	gpio {
		groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
		function = "gpio";
	};
};

&ethernet {
	nvmem-cells = <&macaddr_factory_2e>;
	nvmem-cell-names = "mac-address";
};

&esw {
	mediatek,portmap = <0x3e>;
};

&wmac {
	ralink,mtd-eeprom = <&factory 0x0>;
};

&factory {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_factory_2e: macaddr@2e {
		reg = <0x2e 0x6>;
	};
};