// SPDX-License-Identifier: GPL-2.0-or-later /dts-v1/; #include #include #include #include #include #include #include / { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6368"; aliases { nflash = &nflash; pflash = &pflash; pinctrl = &pinctrl; serial0 = &uart0; serial1 = &uart1; spi0 = &lsspi; }; chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; clocks { periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; clock-output-names = "periph"; }; }; cpus { #address-cells = <1>; #size-cells = <0>; brcm,bmips-cbr-reg = <0xff400000>; mips-hpt-frequency = <200000000>; cpu@0 { compatible = "brcm,bmips4350", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; }; cpu@1 { compatible = "brcm,bmips4350", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; }; }; cpu_intc: interrupt-controller { #address-cells = <0>; compatible = "mti,cpu-interrupt-controller"; interrupt-controller; #interrupt-cells = <1>; }; memory@0 { device_type = "memory"; reg = <0 0>; }; ubus { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges; periph_clk: clock-controller@10000004 { compatible = "brcm,bcm6368-clocks"; reg = <0x10000004 0x4>; #clock-cells = <1>; }; pll_cntl: syscon@10000008 { compatible = "syscon", "simple-mfd"; reg = <0x10000008 0x4>; native-endian; syscon-reboot { compatible = "syscon-reboot"; offset = <0x0>; mask = <0x1>; }; }; periph_rst: reset-controller@10000010 { compatible = "brcm,bcm6345-reset"; reg = <0x10000010 0x4>; #reset-cells = <1>; }; ext_intc0: interrupt-controller@10000018 { #address-cells = <1>; compatible = "brcm,bcm6345-ext-intc"; reg = <0x10000018 0x4>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&periph_intc>; interrupts = , , , ; }; ext_intc1: interrupt-controller@1000001c { #address-cells = <1>; compatible = "brcm,bcm6345-ext-intc"; reg = <0x1000001c 0x4>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&periph_intc>; interrupts = , ; }; periph_intc: interrupt-controller@10000020 { #address-cells = <1>; compatible = "brcm,bcm6345-l1-intc"; reg = <0x10000020 0x10>, <0x10000030 0x10>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&cpu_intc>; interrupts = <2>, <3>; }; wdt: watchdog@1000005c { compatible = "brcm,bcm7038-wdt"; reg = <0x1000005c 0xc>; clocks = <&periph_osc>; timeout-sec = <30>; }; gpio_cntl: syscon@10000080 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6368-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x10000080 0x80>; ranges = <0 0x10000080 0x80>; native-endian; gpio: gpio@0 { compatible = "brcm,bcm6368-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 38>; #gpio-cells = <2>; }; pinctrl: pinctrl@18 { compatible = "brcm,bcm6368-pinctrl"; reg = <0x18 0x4>, <0x38 0x4>; pinctrl_analog_afe_0: analog_afe_0-pins { function = "analog_afe_0"; pins = "gpio0"; }; pinctrl_analog_afe_1: analog_afe_1-pins { function = "analog_afe_1"; pins = "gpio1"; }; pinctrl_sys_irq: sys_irq-pins { function = "sys_irq"; pins = "gpio2"; }; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio3"; }; pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio4"; }; }; pinctrl_inet_led: inet_led-pins { function = "inet_led"; pins = "gpio5"; }; pinctrl_ephy0_led: ephy0_led-pins { function = "ephy0_led"; pins = "gpio6"; }; pinctrl_ephy1_led: ephy1_led-pins { function = "ephy1_led"; pins = "gpio7"; }; pinctrl_ephy2_led: ephy2_led-pins { function = "ephy2_led"; pins = "gpio8"; }; pinctrl_ephy3_led: ephy3_led-pins { function = "ephy3_led"; pins = "gpio9"; }; pinctrl_robosw_led_data: robosw_led_data-pins { function = "robosw_led_data"; pins = "gpio10"; }; pinctrl_robosw_led_clk: robosw_led_clk-pins { function = "robosw_led_clk"; pins = "gpio11"; }; pinctrl_robosw_led0: robosw_led0-pins { function = "robosw_led0"; pins = "gpio12"; }; pinctrl_robosw_led1: robosw_led1-pins { function = "robosw_led1"; pins = "gpio13"; }; pinctrl_usb_device_led: usb_device_led-pins { function = "usb_device_led"; pins = "gpio14"; }; pinctrl_pci: pci-pins { pinctrl_pci_req1: pci_req1-pins { function = "pci_req1"; pins = "gpio16"; }; pinctrl_pci_gnt1: pci_gnt1-pins { function = "pci_gnt1"; pins = "gpio17"; }; pinctrl_pci_intb: pci_intb-pins { function = "pci_intb"; pins = "gpio18"; }; pinctrl_pci_req0: pci_req0-pins { function = "pci_req0"; pins = "gpio19"; }; pinctrl_pci_gnt0: pci_gnt0-pins { function = "pci_gnt0"; pins = "gpio20"; }; }; pinctrl_pcmcia: pcmcia-pins { pinctrl_pcmcia_cd1: pcmcia_cd1-pins { function = "pcmcia_cd1"; pins = "gpio22"; }; pinctrl_pcmcia_cd2: pcmcia_cd2-pins { function = "pcmcia_cd2"; pins = "gpio23"; }; pinctrl_pcmcia_vs1: pcmcia_vs1-pins { function = "pcmcia_vs1"; pins = "gpio24"; }; pinctrl_pcmcia_vs2: pcmcia_vs2-pins { function = "pcmcia_vs2"; pins = "gpio25"; }; }; pinctrl_ebi_cs2: ebi_cs2-pins { function = "ebi_cs2"; pins = "gpio26"; }; pinctrl_ebi_cs3: ebi_cs3-pins { function = "ebi_cs3"; pins = "gpio27"; }; pinctrl_spi_cs2: spi_cs2-pins { function = "spi_cs2"; pins = "gpio28"; }; pinctrl_spi_cs3: spi_cs3-pins { function = "spi_cs3"; pins = "gpio29"; }; pinctrl_spi_cs4: spi_cs4-pins { function = "spi_cs4"; pins = "gpio30"; }; pinctrl_spi_cs5: spi_cs5-pins { function = "spi_cs5"; pins = "gpio31"; }; pinctrl_uart1: uart1-pins { function = "uart1"; pins = "uart1_grp"; }; }; }; leds: led-controller@100000d0 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6358-leds"; reg = <0x100000d0 0x8>; status = "disabled"; }; uart0: serial@10000100 { compatible = "brcm,bcm6345-uart"; reg = <0x10000100 0x18>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_osc>; clock-names = "periph"; status = "disabled"; }; uart1: serial@10000120 { compatible = "brcm,bcm6345-uart"; reg = <0x10000120 0x18>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_osc>; clock-names = "periph"; status = "disabled"; }; nflash: nand@10000200 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,nand-bcm6368", "brcm,brcmnand-v2.1", "brcm,brcmnand"; reg = <0x10000200 0x180>, <0x10000600 0x200>, <0x10000070 0x10>; reg-names = "nand", "nand-cache", "nand-int-base"; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_clk BCM6368_CLK_NAND>; clock-names = "nand"; status = "disabled"; }; lsspi: spi@10000800 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_clk BCM6368_CLK_SPI>; clock-names = "spi"; resets = <&periph_rst BCM6368_RST_SPI>; status = "disabled"; }; pci: pci@10001000 { compatible = "brcm,bcm6348-pci"; reg = <0x10001000 0x200>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; bus-range = <0x00 0x01>; ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>, <0x1000000 0 0x08000000 0x08000000 0 0x0010000>; linux,pci-probe-only = <1>; interrupt-parent = <&periph_intc>; interrupts = ; resets = <&periph_rst BCM6368_RST_MPI>; reset-names = "pci"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pci>; brcm,remap; status = "disabled"; }; ehci: usb@10001500 { compatible = "brcm,bcm6368-ehci", "generic-ehci"; reg = <0x10001500 0x100>; big-endian; spurious-oc; interrupt-parent = <&periph_intc>; interrupts = ; phys = <&usbh 0>; phy-names = "usb"; status = "disabled"; }; ohci: usb@10001600 { compatible = "brcm,bcm6368-ohci", "generic-ohci"; reg = <0x10001600 0x100>; big-endian; no-big-frame-no; interrupt-parent = <&periph_intc>; interrupts = ; phys = <&usbh 0>; phy-names = "usb"; status = "disabled"; }; usbh: usb-phy@10001700 { compatible = "brcm,bcm6368-usbh-phy"; reg = <0x10001700 0x38>; #phy-cells = <1>; clocks = <&periph_clk BCM6368_CLK_USBH>; clock-names = "usbh"; resets = <&periph_rst BCM6368_RST_USBH>; status = "disabled"; }; random: rng@10004180 { compatible = "brcm,bcm6368-rng"; reg = <0x10004180 0x14>; clocks = <&periph_clk BCM6368_CLK_IPSEC>; clock-names = "ipsec"; resets = <&periph_rst BCM6368_RST_IPSEC>; }; ethernet: ethernet@10006800 { compatible = "brcm,bcm6368-enetsw"; reg = <0x10006800 0x80>, <0x10006a00 0x80>, <0x10006c00 0x80>; reg-names = "dma", "dma-channels", "dma-sram"; interrupt-parent = <&periph_intc>; interrupts = , ; interrupt-names = "rx", "tx"; clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>, <&periph_clk BCM6368_CLK_SWPKT_SAR>, <&periph_clk BCM6368_CLK_ROBOSW>; resets = <&periph_rst BCM6368_RST_SWITCH>, <&periph_rst BCM6368_RST_EPHY>; dma-rx = <0>; dma-tx = <1>; status = "disabled"; }; switch0: switch@10f00000 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6368-switch"; reg = <0x10f00000 0x8000>; big-endian; ports { #address-cells = <1>; #size-cells = <0>; port@8 { reg = <8>; phy-mode = "internal"; ethernet = <ðernet>; fixed-link { speed = <1000>; full-duplex; }; }; }; }; mdio: mdio@10f000b0 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6368-mdio-mux"; reg = <0x10f000b0 0x8>; mdio_int: mdio@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; phy1: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; }; phy2: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <2>; }; phy3: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <3>; }; phy4: ethernet-phy@4 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <4>; }; }; mdio_ext: mdio@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; }; }; }; pflash: nor@18000000 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x18000000 0x2000000>; bank-width = <2>; status = "disabled"; }; };