From fd72b430d69e0352214449cccf3c111b0390ee99 Mon Sep 17 00:00:00 2001 From: Dom Cobley Date: Wed, 20 Apr 2022 18:08:38 +0100 Subject: [PATCH] drm/v3d: Switch clock setting to new api Signed-off-by: Dom Cobley drm/v3d: Convert to new clock range API Signed-off-by: Maxime Ripard --- drivers/gpu/drm/v3d/v3d_drv.c | 22 ++++++++++++++++++++-- drivers/gpu/drm/v3d/v3d_gem.c | 4 ++-- 2 files changed, 22 insertions(+), 4 deletions(-) --- a/drivers/gpu/drm/v3d/v3d_drv.c +++ b/drivers/gpu/drm/v3d/v3d_drv.c @@ -24,6 +24,9 @@ #include #include #include + +#include + #include #include "v3d_drv.h" @@ -207,6 +210,8 @@ map_regs(struct v3d_dev *v3d, void __iom static int v3d_platform_drm_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + struct rpi_firmware *firmware; + struct device_node *node; struct drm_device *drm; struct v3d_dev *v3d; int ret; @@ -266,7 +271,20 @@ static int v3d_platform_drm_probe(struct dev_err(dev, "Failed to get clock (%ld)\n", PTR_ERR(v3d->clk)); return PTR_ERR(v3d->clk); } - v3d->clk_up_rate = clk_get_rate(v3d->clk); + + node = rpi_firmware_find_node(); + if (!node) + return -EINVAL; + + firmware = rpi_firmware_get(node); + of_node_put(node); + if (!firmware) + return -EPROBE_DEFER; + + v3d->clk_up_rate = rpi_firmware_clk_get_max_rate(firmware, + RPI_FIRMWARE_V3D_CLK_ID); + rpi_firmware_put(firmware); + /* For downclocking, drop it to the minimum frequency we can get from * the CPRMAN clock generator dividing off our parent. The divider is * 4 bits, but ask for just higher than that so that rounding doesn't @@ -300,7 +318,7 @@ static int v3d_platform_drm_probe(struct if (ret) goto irq_disable; - ret = clk_set_rate(v3d->clk, v3d->clk_down_rate); + ret = clk_set_min_rate(v3d->clk, v3d->clk_down_rate); WARN_ON_ONCE(ret != 0); return 0; --- a/drivers/gpu/drm/v3d/v3d_gem.c +++ b/drivers/gpu/drm/v3d/v3d_gem.c @@ -25,7 +25,7 @@ v3d_clock_down_work(struct work_struct * container_of(work, struct v3d_dev, clk_down_work.work); int ret; - ret = clk_set_rate(v3d->clk, v3d->clk_down_rate); + ret = clk_set_min_rate(v3d->clk, v3d->clk_down_rate); v3d->clk_up = false; WARN_ON_ONCE(ret != 0); } @@ -39,7 +39,7 @@ v3d_clock_up_get(struct v3d_dev *v3d) if (!v3d->clk_up) { int ret; - ret = clk_set_rate(v3d->clk, v3d->clk_up_rate); + ret = clk_set_min_rate(v3d->clk, v3d->clk_up_rate); WARN_ON_ONCE(ret != 0); v3d->clk_up = true; }