// SPDX-License-Identifier: (GPL-2.0-only OR MIT) /dts-v1/; #include #include #include #include "mt7622.dtsi" #include "mt6380.dtsi" / { model = "TOTOLINK A8000RU"; compatible = "totolink,a8000ru", "mediatek,mt7622"; aliases { label-mac-device = &gmac0; led-boot = &led_status; led-failsafe = &led_status; led-running = &led_status; led-upgrade = &led_status; serial0 = &uart0; }; chosen { stdout-path = "serial0:115200n8"; bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512"; }; cpus { cpu@0 { proc-supply = <&mt6380_vcpu_reg>; sram-supply = <&mt6380_vm_reg>; }; cpu@1 { proc-supply = <&mt6380_vcpu_reg>; sram-supply = <&mt6380_vm_reg>; }; }; gpio-keys { compatible = "gpio-keys"; reset { label = "reset"; linux,code = ; gpios = <&pio 0 GPIO_ACTIVE_LOW>; }; wps { label = "wps"; linux,code = ; gpios = <&pio 102 GPIO_ACTIVE_LOW>; }; }; gpio-leds { compatible = "gpio-leds"; led_status: status_red { function = LED_FUNCTION_STATUS; color = ; gpios = <&pio 81 GPIO_ACTIVE_LOW>; default-state = "on"; }; }; reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; }; reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; reg_5v: regulator-5v { compatible = "regulator-fixed"; regulator-name = "fixed-5V"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-boot-on; regulator-always-on; }; rtkgsw: rtkgsw@0 { compatible = "mediatek,rtk-gsw"; mediatek,ethsys = <ðsys>; mediatek,mdio = <&mdio>; mediatek,reset-pin = <&pio 54 0>; status = "okay"; }; }; &pcie0 { pinctrl-names = "default"; pinctrl-0 = <&pcie0_pins>; status = "okay"; }; &slot0 { mt7615@0,0 { reg = <0x0000 0 0 0 0>; mediatek,mtd-eeprom = <&factory 0x5000>; ieee80211-freq-limit = <5490000 6000000>; }; }; &pcie1 { pinctrl-names = "default"; pinctrl-0 = <&pcie1_pins>; status = "okay"; }; &slot1 { mt7615@0,0 { reg = <0x0000 0 0 0 0>; mediatek,mtd-eeprom = <&factory 0x10000>; ieee80211-freq-limit = <5000000 5490000>; }; }; &pio { eth_pins: eth-pins { mux { function = "eth"; groups = "mdc_mdio", "rgmii_via_gmac2"; }; }; pcie0_pins: pcie0-pins { mux { function = "pcie"; groups = "pcie0_pad_perst", "pcie0_1_waken", "pcie0_1_clkreq"; }; }; pcie1_pins: pcie1-pins { mux { function = "pcie"; groups = "pcie1_pad_perst", "pcie1_0_waken", "pcie1_0_clkreq"; }; }; pmic_bus_pins: pmic-bus-pins { mux { function = "pmic"; groups = "pmic_bus"; }; }; /* serial NAND is shared pin with SPI-NOR */ serial_nand_pins: serial-nand-pins { mux { function = "flash"; groups = "snfi"; }; }; uart0_pins: uart0-pins { mux { function = "uart"; groups = "uart0_0_tx_rx" ; }; }; watchdog_pins: watchdog-pins { mux { function = "watchdog"; groups = "watchdog"; }; }; epa_elna_pins: epa-elna-pins { mux { function = "antsel"; groups = "antsel0", "antsel1", "antsel2", "antsel3", "antsel4", "antsel5", "antsel6", "antsel7", "antsel8", "antsel9", "antsel12", "antsel13", "antsel14", "antsel15", "antsel16", "antsel17"; }; }; }; ð { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <ð_pins>; gmac0: mac@0 { compatible = "mediatek,eth-mac"; reg = <0>; nvmem-cells = <&macaddr_factory_2a>; nvmem-cell-names = "mac-address"; phy-connection-type = "2500base-x"; fixed-link { speed = <2500>; full-duplex; pause; }; }; gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; phy-mode = "rgmii"; nvmem-cells = <&macaddr_factory_24>; nvmem-cell-names = "mac-address"; fixed-link { speed = <1000>; full-duplex; pause; }; }; mdio: mdio-bus { #address-cells = <1>; #size-cells = <0>; }; }; &pwrap { pinctrl-names = "default"; pinctrl-0 = <&pmic_bus_pins>; status = "okay"; }; &bch { status = "okay"; }; &snfi { pinctrl-names = "default"; pinctrl-0 = <&serial_nand_pins>; status = "okay"; flash@0 { compatible = "spi-nand"; reg = <0>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; nand-ecc-engine = <&snfi>; mediatek,bmt-v2; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "Preloader"; reg = <0x0 0x80000>; read-only; }; partition@80000 { label = "ATF"; reg = <0x80000 0x40000>; read-only; }; partition@c0000 { label = "u-boot"; reg = <0xc0000 0x80000>; read-only; }; partition@140000 { label = "u-boot-env"; reg = <0x140000 0x80000>; read-only; }; factory: partition@1c0000 { label = "factory"; reg = <0x1c0000 0x40000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; macaddr_factory_24: macaddr@24 { reg = <0x24 0x6>; }; macaddr_factory_2a: macaddr@2a { reg = <0x2a 0x6>; }; }; }; partition@200000 { label = "ubi"; reg = <0x200000 0x6400000>; }; partition@6600000 { label = "User_data"; reg = <0x6600000 0x100000>; }; /* size of this partition varies due to BMT & bad blocks. */ partition@6700000 { label = "reserved"; reg = <0x6700000 0>; }; }; }; }; &ssusb { vusb33-supply = <®_3p3v>; vbus-supply = <®_5v>; status = "okay"; }; &u3phy { status = "okay"; }; &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; status = "okay"; }; &watchdog { pinctrl-names = "default"; pinctrl-0 = <&watchdog_pins>; status = "okay"; }; &wmac { pinctrl-names = "default"; pinctrl-0 = <&epa_elna_pins>; mediatek,mtd-eeprom = <&factory 0x0>; status = "okay"; };