// SPDX-License-Identifier: GPL-2.0-only OR MIT /dts-v1/; #include #include #include #include "mt7981.dtsi" / { model = "Routerich AX3000"; compatible = "routerich,ax3000", "mediatek,mt7981"; aliases { label-mac-device = &wan; led-boot = &led_power_blue; led-failsafe = &led_power_blue; led-running = &led_power_blue; led-upgrade = &led_power_blue; serial0 = &uart0; }; chosen { stdout-path = "serial0:115200n8"; }; gpio-keys { compatible = "gpio-keys"; button-0 { label = "mesh"; linux,input-type = ; linux,code = ; gpios = <&pio 0 GPIO_ACTIVE_LOW>; debounce-interval = <60>; }; button-1 { label = "reset"; gpios = <&pio 1 GPIO_ACTIVE_LOW>; linux,code = ; debounce-interval = <60>; }; }; leds { compatible = "gpio-leds"; led-0 { color = ; function = LED_FUNCTION_WLAN; function-enumerator = <50>; gpios = <&pio 5 GPIO_ACTIVE_LOW>; linux,default-trigger = "phy1tpt"; }; led-1 { color = ; function = LED_FUNCTION_WAN; gpios = <&pio 6 GPIO_ACTIVE_HIGH>; }; led_power_blue: led-2 { color = ; function = LED_FUNCTION_POWER; gpios = <&pio 7 GPIO_ACTIVE_LOW>; }; led-3 { color = ; function = LED_FUNCTION_LAN; function-enumerator = <1>; gpios = <&pio 9 GPIO_ACTIVE_LOW>; }; led-4 { color = ; function = LED_FUNCTION_LAN; function-enumerator = <2>; gpios = <&pio 10 GPIO_ACTIVE_LOW>; }; led-5 { color = ; function = LED_FUNCTION_LAN; function-enumerator = <3>; gpios = <&pio 11 GPIO_ACTIVE_LOW>; }; led-6 { color = ; function = LED_FUNCTION_WAN; gpios = <&pio 12 GPIO_ACTIVE_LOW>; }; led-7 { color = ; function = LED_FUNCTION_WLAN; function-enumerator = <24>; gpios = <&pio 34 GPIO_ACTIVE_LOW>; linux,default-trigger = "phy0tpt"; }; led-8 { color = ; /* LED_FUNCTION_MESH isn't implemented yet */ function = "mesh"; gpios = <&pio 35 GPIO_ACTIVE_LOW>; }; }; memory { reg = <0 0x40000000 0 0x10000000>; }; }; ð { status = "okay"; gmac0: mac@0 { compatible = "mediatek,eth-mac"; reg = <0>; phy-mode = "2500base-x"; nvmem-cell-names = "mac-address"; nvmem-cells = <&macaddr_factory_4 (-1)>; fixed-link { speed = <2500>; full-duplex; pause; }; }; }; &mdio_bus { switch: switch@1f { compatible = "mediatek,mt7531"; reg = <0x1f>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&pio>; interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; }; }; &spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi0_flash_pins>; status = "okay"; /* ESMT F50L1G41LB (128M) */ spi_nand@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spi-nand"; reg = <0>; spi-max-frequency = <52000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-cal-enable; spi-cal-mode = "read-data"; spi-cal-datalen = <7>; spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>; spi-cal-addrlen = <5>; spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; mediatek,nmbm; mediatek,bmt-max-ratio = <1>; mediatek,bmt-max-reserved-blocks = <64>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0_all { label = "spi0.0"; reg = <0x0 0x8000000>; read-only; }; partition@0 { label = "BL2"; reg = <0x0 0x100000>; read-only; }; partition@100000 { label = "u-boot-env"; reg = <0x100000 0x80000>; }; partition@180000 { label = "Factory"; reg = <0x180000 0x200000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x1000>; }; macaddr_factory_4: macaddr@4 { compatible = "mac-base"; reg = <0x4 0x6>; #nvmem-cell-cells = <1>; }; }; }; partition@380000 { label = "FIP"; reg = <0x380000 0x200000>; read-only; }; partition@580000 { label = "ubi"; reg = <0x580000 0x7000000>; }; }; }; }; &switch { ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; label = "lan1"; }; port@2 { reg = <2>; label = "lan2"; }; port@3 { reg = <3>; label = "lan3"; }; wan: port@4 { reg = <4>; label = "wan"; nvmem-cell-names = "mac-address"; nvmem-cells = <&macaddr_factory_4 (-2)>; }; port@6 { reg = <6>; ethernet = <&gmac0>; phy-mode = "2500base-x"; fixed-link { speed = <2500>; full-duplex; pause; }; }; }; }; &pio { spi0_flash_pins: spi0-pins { mux { function = "spi"; groups = "spi0", "spi0_wp_hold"; }; conf-pu { pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; drive-strength = ; bias-pull-up = ; }; conf-pd { pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; drive-strength = ; bias-pull-down = ; }; }; }; &uart0 { status = "okay"; }; &usb_phy { status = "okay"; }; &watchdog { status = "okay"; }; &wifi { status = "okay"; nvmem-cell-names = "eeprom"; nvmem-cells = <&eeprom_factory_0>; }; &xhci { status = "okay"; mediatek,u3p-dis-msk = <0x1>; };