From d6036571b774437bb3bdd378821033e118a01fe8 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Wed, 2 Nov 2022 23:42:52 -0500
Subject: [PATCH 117/117] riscv: dts: allwinner: d1: Add video engine node

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
 arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 30 ++++++++++++++++++++
 1 file changed, 30 insertions(+)

--- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
@@ -105,6 +105,21 @@
 			status = "reserved";
 		};
 
+		ve: video-codec@1c0e000 {
+			compatible = "allwinner,sun20i-d1-video-engine";
+			reg = <0x1c0e000 0x2000>;
+			interrupts = <82 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_VE>,
+				 <&ccu CLK_VE>,
+				 <&ccu CLK_MBUS_VE>;
+			clock-names = "ahb", "mod", "ram";
+			resets = <&ccu RST_BUS_VE>;
+			allwinner,sram = <&ve_sram 1>;
+			interconnects = <&mbus 4>;
+			interconnect-names = "dma-mem";
+			iommus = <&iommu 0>;
+		};
+
 		pio: pinctrl@2000000 {
 			compatible = "allwinner,sun20i-d1-pinctrl";
 			reg = <0x2000000 0x800>;
@@ -591,6 +606,21 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 
+			// FIXME: Address is not verified. It is copied from A64/H6.
+			sram@1d00000 {
+				compatible = "mmio-sram";
+				reg = <0x1d00000 0x40000>;
+				ranges = <0 0x1d00000 0x40000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				ve_sram: sram-section@0 {
+					compatible = "allwinner,sun20i-d1-sram-c1",
+						     "allwinner,sun4i-a10-sram-c1";
+					reg = <0 0x40000>;
+				};
+			};
+
 			regulators@3000150 {
 				compatible = "allwinner,sun20i-d1-system-ldos";
 				reg = <0x3000150 0x4>;