From f292d1bf83ec160bef2532b58aa08f5b71041923 Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: <3cf212c4ce6cd72c09bc47f35f539ba0afd4d106.1678716918.git.lorenzo@kernel.org> References: <3cf212c4ce6cd72c09bc47f35f539ba0afd4d106.1678716918.git.lorenzo@kernel.org> From: Lorenzo Bianconi Date: Sat, 11 Mar 2023 18:13:04 +0100 Subject: [PATCH net-next 2/2] net: ethernet: mtk_wed: move cpuboot in a dedicated dts node Since the cpuboot memory region is not part of the RAM SoC, move cpuboot in a deidicated syscon node. This patch helps to keep backward-compatibility with older version of uboot codebase where we have a limit of 8 reserved-memory dts child nodes. Keep backward-compatibility with older dts version where cpuboot was defined as reserved-memory child node. Signed-off-by: Lorenzo Bianconi --- drivers/net/ethernet/mediatek/mtk_wed_mcu.c | 34 +++++++++++++++++---- drivers/net/ethernet/mediatek/mtk_wed_wo.h | 3 +- 2 files changed, 30 insertions(+), 7 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_wed_mcu.c +++ b/drivers/net/ethernet/mediatek/mtk_wed_mcu.c @@ -32,14 +32,25 @@ static struct mtk_wed_wo_memory_region m }, }; -static u32 wo_r32(u32 reg) +static u32 wo_r32(struct mtk_wed_wo *wo, u32 reg) { - return readl(mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); + u32 val; + + if (!wo->boot_regmap) + return readl(mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); + + if (regmap_read(wo->boot_regmap, reg, &val)) + val = ~0; + + return val; } -static void wo_w32(u32 reg, u32 val) +static void wo_w32(struct mtk_wed_wo *wo, u32 reg, u32 val) { - writel(val, mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); + if (wo->boot_regmap) + regmap_write(wo->boot_regmap, reg, val); + else + writel(val, mem_region[MTK_WED_WO_REGION_BOOT].addr + reg); } static struct sk_buff * @@ -317,6 +328,9 @@ mtk_wed_mcu_load_firmware(struct mtk_wed u32 val, boot_cr; int ret, i; + wo->boot_regmap = syscon_regmap_lookup_by_phandle(wo->hw->node, + "mediatek,wo-cpuboot"); + /* load firmware region metadata */ for (i = 0; i < ARRAY_SIZE(mem_region); i++) { int index = of_property_match_string(wo->hw->node, @@ -325,6 +339,9 @@ mtk_wed_mcu_load_firmware(struct mtk_wed if (index < 0) continue; + if (index == MTK_WED_WO_REGION_BOOT && !IS_ERR(wo->boot_regmap)) + continue; + ret = mtk_wed_get_reserved_memory_region(wo->hw, index, &mem_region[i]); if (ret) return ret; @@ -373,13 +390,13 @@ mtk_wed_mcu_load_firmware(struct mtk_wed boot_cr = MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR; else boot_cr = MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR; - wo_w32(boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16); + wo_w32(wo, boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16); /* wo firmware reset */ - wo_w32(MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00); + wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00); - val = wo_r32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) | + val = wo_r32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) | MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK; - wo_w32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val); + wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val); out: release_firmware(fw); --- a/drivers/net/ethernet/mediatek/mtk_wed_wo.h +++ b/drivers/net/ethernet/mediatek/mtk_wed_wo.h @@ -231,6 +231,7 @@ struct mtk_wed_wo_queue { struct mtk_wed_wo { struct mtk_wed_hw *hw; + struct regmap *boot_regmap; struct mtk_wed_wo_queue q_tx; struct mtk_wed_wo_queue q_rx;