// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;

#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "edimax,rg21s", "mediatek,mt7621-soc";
	model = "Edimax RG21S";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	palmbus: palmbus@1E000000 {
		i2c@900 {
			status = "okay";
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power: led_1 {
			label = "rg21s:red:led1";
			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
		};

		led_2 {
			label = "rg21s:red:led2";
			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
		};

		led_3 {
			label = "rg21s:red:led3";
			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
		};

		led_4 {
			label = "rg21s:red:led4";
			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
		};
	};
};

&sdhci {
	status = "okay";
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0xfb0000>;
			};
		};
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi0: wifi@0,0 {
		compatible = "pci14c3,7615";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x0000>;
		ieee80211-freq-limit = <2400000 2500000>;
	};
};

&pcie1 {
	wifi1: wifi@0,0 {
		compatible = "pci14c3,7615";
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&ethernet {
	mediatek,portmap = "wllll";
	port@5 {
		status = "disabled";
	};
};

&pinctrl {
	state_default: pinctrl0 {
		gpio {
			ralink,group = "wdt", "rgmii2", "jtag", "mdio";
			ralink,function = "gpio";
		};
	};
};

&xhci {
	status = "disabled";
};