// SPDX-License-Identifier: GPL-2.0-or-later

#include "rtl930x.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "xikestor,sks8300-8x", "realtek,rtl930x-soc";
	model = "XikeStor SKS8300-8X";

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x10000000>, /* first 256 MiB */
		      <0x20000000 0x10000000>; /* remaining 256 MiB */
	};

	aliases {
		led-boot = &led_sys;
		led-failsafe = &led_sys;
		led-running = &led_sys;
		led-upgrade = &led_sys;
	};

	chosen {
		stdout-path = "serial0:9600n8";
	};

	i2c_master: i2c@1b00036c {
		compatible = "realtek,rtl9300-i2c";
		reg = <0x1b00036c 0x3c>;
		#address-cells = <1>;
		#size-cells = <0>;
		scl-pin = <8>;
		sda-pin = <9>;
		clock-frequency = <100000>;
	};

	i2c-mux {
		compatible = "realtek,i2c-mux-rtl9300";
		i2c-parent = <&i2c_master>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2c0: i2c@0 {
			reg = <0>;
			scl-pin = <8>;
			sda-pin = <9>;
		};

		i2c1: i2c@1 {
			reg = <1>;
			scl-pin = <8>;
			sda-pin = <10>;
		};

		i2c2: i2c@2 {
			reg = <2>;
			scl-pin = <8>;
			sda-pin = <11>;
		};

		i2c3: i2c@3 {
			reg = <3>;
			scl-pin = <8>;
			sda-pin = <12>;
		};

		i2c4: i2c@4 {
			reg = <4>;
			scl-pin = <8>;
			sda-pin = <13>;
		};

		i2c5: i2c@5 {
			reg = <5>;
			scl-pin = <8>;
			sda-pin = <14>;
		};

		i2c6: i2c@6 {
			reg = <6>;
			scl-pin = <8>;
			sda-pin = <15>;
		};

		i2c7: i2c@7 {
			reg = <7>;
			scl-pin = <8>;
			sda-pin = <16>;
		};
	};

	keys {
		compatible = "gpio-keys";

		button-reset {
			label = "reset";
			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_sys: led-0 {
			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_STATUS;
		};
	};

	led_set {
		compatible = "realtek,rtl9300-leds";
		active-low;

		/*
		 * LED set 0
		 *
		 * - LED[0](Green): 10G/LINK/ACT
		 * - LED[1](Amber): 10M/100M/1G/2.5G/5G/LINK/ACT
		 */
		led_set0 = <0x0baa 0x0a01>;
	};

	sfp0: sfp-p1 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c0>;
		los-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <2900>;
	};

	sfp1: sfp-p2 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c1>;
		los-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <1500>;
	};

	sfp2: sfp-p3 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c2>;
		los-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <1500>;
	};

	sfp3: sfp-p4 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c3>;
		los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 10 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <2000>;
	};

	sfp4: sfp-p5 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c4>;
		los-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <2000>;
	};

	sfp5: sfp-p6 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c5>;
		los-gpio = <&gpio1 21 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 22 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <1500>;
	};

	sfp6: sfp-p7 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c6>;
		los-gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <1500>;
	};

	sfp7: sfp-p8 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c7>;
		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
		maximum-power-milliwatt = <2900>;
	};
};

&mdio_aux {
	status = "okay";

	gpio1: gpio@0 {
		compatible = "realtek,rtl8231";
		reg = <0>;

		gpio-controller;
		#gpio-cells = <2>;
		gpio-ranges = <&gpio1 0 0 37>;

		led-controller {
			compatible = "realtek,rtl8231-leds";
			status = "disabled";
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x100000>;
				read-only;
			};

			/* "flash_raw" on stock */
			partition@100000 {
				label = "board-info";
				reg = <0x100000 0x30000>;
				read-only;
			};

			partition@130000 {
				label = "syslog";
				reg = <0x130000 0xd0000>;
				read-only;
			};

			/* "flash_user" on stock */
			partition@200000 {
				compatible = "fixed-partitions";
				label = "firmware";
				reg = <0x200000 0x1e00000>;
				#address-cells = <1>;
				#size-cells = <1>;

				partition@0 {
					label = "kernel";
					reg = <0x0 0x800000>;
				};

				partition@800000 {
					label = "rootfs";
					reg = <0x800000 0x1600000>;
				};
			};
		};
	};
};

&ethernet0 {
	mdio: mdio-bus {
		compatible = "realtek,rtl838x-mdio";
		regmap = <&ethernet0>;
		#address-cells = <1>;
		#size-cells = <0>;

		phy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <0>;
			sds = <2>;
		};

		phy8: ethernet-phy@8 {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <8>;
			sds = <3>;
		};

		phy16: ethernet-phy@10 {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <16>;
			sds = <4>;
		};

		phy20: ethernet-phy@14 {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <20>;
			sds = <5>;
		};

		phy24: ethernet-phy@18 {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <24>;
			sds = <6>;
		};

		phy25: ethernet-phy@19 {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <25>;
			sds = <7>;
		};

		phy26: ethernet-phy@1a {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <26>;
			sds = <8>;
		};

		phy27: ethernet-phy@1b {
			compatible = "ethernet-phy-ieee802.3-c22";
			phy-is-integrated;
			reg = <27>;
			sds = <9>;
		};
	};
};

&switch0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			label = "lan1";
			phy-handle = <&phy0>;
			phy-mode = "10gbase-r";
			sfp = <&sfp0>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@8 {
			reg = <8>;
			label = "lan2";
			phy-handle = <&phy8>;
			phy-mode = "10gbase-r";
			sfp = <&sfp1>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@10 {
			reg = <16>;
			label = "lan3";
			phy-handle = <&phy16>;
			phy-mode = "10gbase-r";
			sfp = <&sfp2>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@14 {
			reg = <20>;
			label = "lan4";
			phy-handle = <&phy20>;
			phy-mode = "10gbase-r";
			sfp = <&sfp3>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@18 {
			reg = <24>;
			label = "lan5";
			phy-handle = <&phy24>;
			phy-mode = "10gbase-r";
			sfp = <&sfp4>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@19 {
			reg = <25>;
			label = "lan6";
			phy-handle = <&phy25>;
			phy-mode = "10gbase-r";
			sfp = <&sfp5>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@1a {
			reg = <26>;
			label = "lan7";
			phy-handle = <&phy26>;
			phy-mode = "10gbase-r";
			sfp = <&sfp6>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@1b {
			reg = <27>;
			label = "lan8";
			phy-handle = <&phy27>;
			phy-mode = "10gbase-r";
			sfp = <&sfp7>;
			managed = "in-band-status";
			led-set = <0>;
		};

		port@1c {
			ethernet = <&ethernet0>;
			reg = <28>;
			phy-mode = "internal";

			fixed-link {
				speed = <10000>;
				full-duplex;
			};
		};
	};
};