#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "tplink,re350-v1", "mediatek,mt7621-soc";
	model = "TP-LINK RE350 v1";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	leds {
		compatible = "gpio-leds";

		led_power: power {
			label = "blue:power";
			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
		};

		wifi2g {
			label = "blue:wifi2G";
			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
		};

		wifi5g {
			label = "blue:wifi5G";
			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
		};

		wps_r {
			label = "red:wps";
			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
		};

		wps_b {
			label = "blue:wps";
			gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
		};

		eth {
			label = "green:eth_act";
			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
		};

		eth2 {
			label = "green:eth_link";
			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		led {
			label = "led";
			gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
			linux,code = <BTN_0>;
		};

		reset {
			label = "reset";
			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		power {
			label = "power";
			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x20000>;
				read-only;
			};

			partition@20000 {
				compatible = "tplink,firmware";
				label = "firmware";
				reg = <0x20000 0x5e0000>;
			};

			config: partition@600000 {
				label = "config";
				reg = <0x600000 0x50000>;
				read-only;
			};

			radio: partition@7f0000 {
				label = "radio";
				reg = <0x7f0000 0x10000>;
				read-only;
			};
		};
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	mt76@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&radio 0x0>;
		nvmem-cells = <&macaddr_config_10008>;
		nvmem-cell-names = "mac-address";
		mac-address-increment = <1>;
	};
};

&pcie1 {
	mt76@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&radio 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
		nvmem-cells = <&macaddr_config_10008>;
		nvmem-cell-names = "mac-address";
		mac-address-increment = <2>;
	};
};

&ethernet {
	pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
};

&gmac0 {
	nvmem-cells = <&macaddr_config_10008>;
	nvmem-cell-names = "mac-address";
};

&switch0 {
	ports {
		port@0 {
			status = "okay";
			label = "lan";
		};
	};
};

&state_default {
	gpio {
		groups = "rgmii2", "wdt";
		function = "gpio";
	};
};

&config {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_config_10008: macaddr@10008 {
		reg = <0x10008 0x6>;
	};
};