From 492b06747f544c19b5ffe531a24b67858764c50e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com> Date: Mon, 29 May 2023 10:02:44 +0200 Subject: [PATCH 896/898] net: dsa: mv88e6xxx: fix 88E6393X family internal phys layout MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 88E6393X/88E6193X/88E6191X switches have in fact 8 internal PHYs, but those are not present starting at port 0: supported ports go from 1 to 8 Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> --- drivers/net/dsa/mv88e6xxx/chip.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5372,7 +5372,8 @@ static const struct mv88e6xxx_info mv88e .name = "Marvell 88E6191X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ - .num_internal_phys = 9, + .num_internal_phys = 8, + .internal_phys_offset = 1, .max_vid = 8191, .port_base_addr = 0x0, .phy_base_addr = 0x0, @@ -5394,7 +5395,8 @@ static const struct mv88e6xxx_info mv88e .name = "Marvell 88E6193X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ - .num_internal_phys = 9, + .num_internal_phys = 8, + .internal_phys_offset = 1, .max_vid = 8191, .port_base_addr = 0x0, .phy_base_addr = 0x0, @@ -5704,7 +5706,8 @@ static const struct mv88e6xxx_info mv88e .name = "Marvell 88E6393X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ - .num_internal_phys = 9, + .num_internal_phys = 8, + .internal_phys_offset = 1, .max_vid = 8191, .port_base_addr = 0x0, .phy_base_addr = 0x0,