#include "rt3050.dtsi" #include / { compatible = "planex,mzk-wdpr", "ralink,rt3052-soc"; model = "Planex MZK-WDPR"; chosen { bootargs = "console=ttyS0,115200"; }; flash@1f000000 { compatible = "cfi-flash"; reg = <0x1f000000 0x800000>; bank-width = <2>; device-width = <2>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x10000>; read-only; }; partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x200>; }; macaddr_factory_28: macaddr@28 { reg = <0x28 0x6>; }; }; }; partition@7f0000 { label = "Data3G"; reg = <0x7f0000 0x10000>; read-only; }; partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x50000 0x680000>; }; }; }; gpio-export { compatible = "gpio-export"; lcd_ctrl1 { gpio-export,name = "lcd_ctrl1"; gpio-export,output = <0>; gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; }; }; }; &state_default { gpio { groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf"; function = "gpio"; }; }; ðernet { nvmem-cells = <&macaddr_factory_28>; nvmem-cell-names = "mac-address"; }; &esw { mediatek,portmap = <0x2f>; }; &wmac { nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; }; &otg { status = "okay"; };