// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "rtl838x.dtsi" #include #include #include / { compatible = "apresia,aplgs120gtss", "realtek,rtl8382-soc"; model = "APRESIA ApresiaLightGS120GT-SS"; aliases { led-boot = &led_power; led-failsafe = &led_power; led-running = &led_power; led-upgrade = &led_power; }; memory@0 { device_type = "memory"; reg = <0x0 0x10000000>; }; leds { compatible = "gpio-leds"; led_power: led-0 { gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; color = ; function = LED_FUNCTION_POWER; }; led-1 { gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; color = ; function = LED_FUNCTION_FAULT; }; /* LED chip is soldered, but no hole on the case */ led-2 { gpios = <&gpio1 36 GPIO_ACTIVE_LOW>; color = ; }; }; keys { compatible = "gpio-keys-polled"; poll-interval = <20>; reset { label = "reset"; gpios = <&gpio1 33 GPIO_ACTIVE_LOW>; linux,code = ; }; }; gpio-restart { compatible = "gpio-restart"; gpios = <&gpio1 34 GPIO_ACTIVE_LOW>; open-source; }; gpio1: rtl8231-gpio { compatible = "realtek,rtl8231-gpio"; #gpio-cells = <2>; gpio-controller; indirect-access-bus-id = <0>; }; i2c0: i2c-gpio-0 { compatible = "i2c-gpio"; sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-gpio,delay-us = <2>; #address-cells = <1>; #size-cells = <0>; }; i2c1: i2c-gpio-1 { compatible = "i2c-gpio"; sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-gpio,delay-us = <2>; #address-cells = <1>; #size-cells = <0>; }; i2c2: i2c-gpio-2 { compatible = "i2c-gpio"; sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio1 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-gpio,delay-us = <2>; #address-cells = <1>; #size-cells = <0>; }; i2c3: i2c-gpio-3 { compatible = "i2c-gpio"; sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-gpio,delay-us = <2>; #address-cells = <1>; #size-cells = <0>; }; /* 4x TX-Disable lines are provided by RTL8214FC */ sfp0: sfp-p17 { compatible = "sff,sfp"; i2c-bus = <&i2c1>; los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>; }; sfp1: sfp-p18 { compatible = "sff,sfp"; i2c-bus = <&i2c0>; los-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; }; sfp2: sfp-p19 { compatible = "sff,sfp"; i2c-bus = <&i2c3>; los-gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>; mod-def0-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>; }; sfp3: sfp-p20 { compatible = "sff,sfp"; i2c-bus = <&i2c2>; los-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; }; }; &gpio0 { rtl8231_reset { gpio-hog; gpios = <1 GPIO_ACTIVE_HIGH>; output-high; line-name = "rtl8231-reset"; }; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x80000>; read-only; }; partition@80000 { label = "u-boot-env"; reg = <0x80000 0x40000>; }; partition@c0000 { label = "u-boot-env2"; reg = <0xc0000 0x40000>; }; partition@100000 { compatible = "openwrt,uimage", "denx,uimage"; label = "firmware"; reg = <0x100000 0xe80000>; openwrt,ih-magic = <0x12345000>; }; partition@f80000 { label = "firmware2"; reg = <0xf80000 0xe80000>; }; partition@1e00000 { label = "jffs2"; reg = <0x1e00000 0x200000>; read-only; }; }; }; }; ðernet0 { mdio-bus { compatible = "realtek,rtl838x-mdio"; regmap = <ðernet0>; #address-cells = <1>; #size-cells = <0>; EXTERNAL_PHY(0) EXTERNAL_PHY(1) EXTERNAL_PHY(2) EXTERNAL_PHY(3) EXTERNAL_PHY(4) EXTERNAL_PHY(5) EXTERNAL_PHY(6) EXTERNAL_PHY(7) INTERNAL_PHY(8) INTERNAL_PHY(9) INTERNAL_PHY(10) INTERNAL_PHY(11) INTERNAL_PHY(12) INTERNAL_PHY(13) INTERNAL_PHY(14) INTERNAL_PHY(15) EXTERNAL_SFP_PHY_FULL(24, 0) EXTERNAL_SFP_PHY_FULL(25, 1) EXTERNAL_SFP_PHY_FULL(26, 2) EXTERNAL_SFP_PHY_FULL(27, 3) }; }; &switch0 { ports { #address-cells = <1>; #size-cells = <0>; SWITCH_PORT(0, 1, qsgmii) SWITCH_PORT(1, 2, qsgmii) SWITCH_PORT(2, 3, qsgmii) SWITCH_PORT(3, 4, qsgmii) SWITCH_PORT(4, 5, qsgmii) SWITCH_PORT(5, 6, qsgmii) SWITCH_PORT(6, 7, qsgmii) SWITCH_PORT(7, 8, qsgmii) SWITCH_PORT(8, 9, internal) SWITCH_PORT(9, 10, internal) SWITCH_PORT(10, 11, internal) SWITCH_PORT(11, 12, internal) SWITCH_PORT(12, 13, internal) SWITCH_PORT(13, 14, internal) SWITCH_PORT(14, 15, internal) SWITCH_PORT(15, 16, internal) SWITCH_PORT(24, 17, qsgmii) SWITCH_PORT(25, 18, qsgmii) SWITCH_PORT(26, 19, qsgmii) SWITCH_PORT(27, 20, qsgmii) port@28 { ethernet = <ðernet0>; reg = <28>; phy-mode = "internal"; fixed-link { speed = <1000>; full-duplex; }; }; }; };