From 8cbdb2526c3d7ba2e0c8c771773595f195135f54 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 1 Nov 2021 18:15:04 +0100 Subject: [PATCH] arm: dts: ipq4019: add switch node Since the built-in IPQ40xx switch now has a driver, add the required node for it to work. Signed-off-by: Robert Marko --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -591,6 +591,82 @@ status = "disabled"; }; + switch: switch@c000000 { + compatible = "qca,ipq4019-qca8337n"; + reg = <0xc000000 0x80000>, <0x98000 0x800>; + reg-names = "base", "psgmii_phy"; + resets = <&gcc ESS_PSGMII_ARES>; + reset-names = "psgmii_rst"; + mdio = <&mdio>; + psgmii-ethphy = <&psgmiiphy>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { /* MAC0 */ + reg = <0>; + label = "cpu"; + ethernet = <&gmac>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + asym-pause; + }; + }; + + swport1: port@1 { /* MAC1 */ + reg = <1>; + label = "lan1"; + phy-handle = <ðphy0>; + phy-mode = "psgmii"; + + status = "disabled"; + }; + + swport2: port@2 { /* MAC2 */ + reg = <2>; + label = "lan2"; + phy-handle = <ðphy1>; + phy-mode = "psgmii"; + + status = "disabled"; + }; + + swport3: port@3 { /* MAC3 */ + reg = <3>; + label = "lan3"; + phy-handle = <ðphy2>; + phy-mode = "psgmii"; + + status = "disabled"; + }; + + swport4: port@4 { /* MAC4 */ + reg = <4>; + label = "lan4"; + phy-handle = <ðphy3>; + phy-mode = "psgmii"; + + status = "disabled"; + }; + + swport5: port@5 { /* MAC5 */ + reg = <5>; + label = "wan"; + phy-handle = <ðphy4>; + phy-mode = "psgmii"; + + status = "disabled"; + }; + }; + }; + gmac: ethernet@c080000 { compatible = "qcom,ipq4019-ess-edma"; reg = <0xc080000 0x8000>;