From d9982d245fc7f1b7d65d74cd08d53eccdcbd5cf2 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Mon, 9 Dec 2024 17:50:31 +0100
Subject: [PATCH 1/2] arm64: dts: qcom: add partition table for ipq9574 rdp
 common

Add partition table for ipq9574 SoC common to every RDB board.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 .../boot/dts/qcom/ipq9574-rdp-common.dtsi     | 146 +++++++++++++++++-
 1 file changed, 145 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
index 9a8692377176..13b623603d37 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
@@ -74,11 +74,155 @@ &blsp1_spi0 {
 	status = "okay";
 
 	flash@0 {
-		compatible = "micron,n25q128a11", "jedec,spi-nor";
+		compatible = "jedec,spi-nor";
 		reg = <0>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "0:sbl1";
+				reg = <0x0 0xc0000>;
+				read-only;
+			};
+
+			partition@c0000 {
+				label = "0:mibib";
+				reg = <0xc0000 0x10000>;
+				read-only;
+			};
+
+			partition@d0000 {
+				label = "0:bootconfig";
+				reg = <0xd0000 0x20000>;
+				read-only;
+			};
+
+			partition@f0000 {
+				label = "0:bootconfig1";
+				reg = <0xf0000 0x20000>;
+				read-only;
+			};
+
+			partition@110000 {
+				label = "0:qsee";
+				reg = <0x110000 0x180000>;
+				read-only;
+			};
+
+			partition@290000 {
+				label = "0:qsee_1";
+				reg = <0x290000 0x180000>;
+				read-only;
+			};
+
+			partition@410000 {
+				label = "0:devcfg";
+				reg = <0x410000 0x10000>;
+				read-only;
+			};
+
+			partition@420000 {
+				label = "0:devcfg_1";
+				reg = <0x420000 0x10000>;
+				read-only;
+			};
+
+			partition@430000 {
+				label = "0:apdp";
+				reg = <0x430000 0x10000>;
+				read-only;
+			};
+
+			partition@440000 {
+				label = "0:apdp_1";
+				reg = <0x440000 0x10000>;
+				read-only;
+			};
+
+			partition@450000 {
+				label = "0:tme";
+				reg = <0x450000 0x40000>;
+				read-only;
+			};
+
+			partition@490000 {
+				label = "0:tme_1";
+				reg = <0x490000 0x40000>;
+				read-only;
+			};
+
+			partition@4d0000 {
+				label = "0:rpm";
+				reg = <0x4d0000 0x20000>;
+				read-only;
+			};
+
+			partition@4f0000 {
+				label = "0:rpm_1";
+				reg = <0x4f0000 0x20000>;
+				read-only;
+			};
+
+			partition@510000 {
+				label = "0:cdt";
+				reg = <0x510000 0x10000>;
+				read-only;
+			};
+
+			partition@520000 {
+				label = "0:cdt_1";
+				reg = <0x520000 0x10000>;
+				read-only;
+			};
+
+			partition@530000 {
+				compatible = "u-boot,env";
+				label = "0:appsblenv";
+				reg = <0x530000 0x10000>;
+
+				macaddr_lan: ethaddr {
+					#nvmem-cell-cells = <1>;
+				};
+			};
+
+			partition@540000 {
+				label = "0:appsbl";
+				reg = <0x540000 0xa0000>;
+				read-only;
+			};
+
+			partition@5e0000 {
+				label = "0:appsbl_1";
+				reg = <0x5e0000 0xa0000>;
+				read-only;
+			};
+
+			partition@680000 {
+				label = "0:art";
+				reg = <0x680000 0x100000>;
+				read-only;
+			};
+
+			partition@780000 {
+				label = "0:ethphyfw";
+				reg = <0x780000 0x80000>;
+				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+
+					aqr_fw: aqr-fw@0 {
+						reg = <0x0 0x5fc02>;
+					};
+				};
+			};
+		};
 	};
 };
 
-- 
2.45.2