From fd553e002cb908f0dd681af0b3ddb62965e0cc41 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.com>
Date: Mon, 6 May 2024 12:21:21 +0100
Subject: [PATCH 1077/1085] overlays: Add sc16is750-spi0

Essentially a rename of the equivalent overlay for the SC16IS752.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>
---
 arch/arm/boot/dts/overlays/Makefile           |  1 +
 arch/arm/boot/dts/overlays/README             |  8 +++
 .../dts/overlays/sc16is750-spi0-overlay.dts   | 63 +++++++++++++++++++
 3 files changed, 72 insertions(+)
 create mode 100644 arch/arm/boot/dts/overlays/sc16is750-spi0-overlay.dts

--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -230,6 +230,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
 	rra-digidac1-wm8741-audio.dtbo \
 	sainsmart18.dtbo \
 	sc16is750-i2c.dtbo \
+	sc16is750-spi0.dtbo \
 	sc16is752-i2c.dtbo \
 	sc16is752-spi0.dtbo \
 	sc16is752-spi1.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -4128,6 +4128,14 @@ Params: int_pin                 GPIO use
         xtal                    On-board crystal frequency (default 14745600)
 
 
+Name:   sc16is750-spi0
+Info:   Overlay for the NXP SC16IS750 UART with SPI Interface
+        Enables the chip on SPI0.
+Load:   dtoverlay=sc16is750-spi0,<param>=<val>
+Params: int_pin                 GPIO used for IRQ (default 24)
+        xtal                    On-board crystal frequency (default 14745600)
+
+
 Name:   sc16is752-i2c
 Info:   Overlay for the NXP SC16IS752 dual UART with I2C Interface
         Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/sc16is750-spi0-overlay.dts
@@ -0,0 +1,63 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "brcm,bcm2835";
+
+	fragment@0 {
+		target = <&spi0>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "okay";
+
+			sc16is750: sc16is750@0 {
+				compatible = "nxp,sc16is750";
+				reg = <0>; /* CE0 */
+				clocks = <&sc16is750_clk>;
+				interrupt-parent = <&gpio>;
+				interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
+				pinctrl-0 = <&int_pins>;
+				pinctrl-names = "default";
+				gpio-controller;
+				#gpio-cells = <2>;
+				spi-max-frequency = <4000000>;
+			};
+		};
+	};
+
+	fragment@1 {
+		target = <&spidev0>;
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+
+	fragment@2 {
+		target-path = "/";
+		__overlay__ {
+			sc16is750_clk: sc16is750_spi0_0_clk {
+				compatible = "fixed-clock";
+				#clock-cells = <0>;
+				clock-frequency = <14745600>;
+			};
+		};
+	};
+
+	fragment@3 {
+		target = <&gpio>;
+		__overlay__ {
+			int_pins: int_pins@18 {
+					brcm,pins = <24>;
+					brcm,function = <0>; /* in */
+					brcm,pull = <0>; /* none */
+			};
+		};
+	};
+
+	__overrides__ {
+		int_pin = <&sc16is750>,"interrupts:0", <&int_pins>,"brcm,pins:0",
+			  <&int_pins>,"reg:0";
+		xtal = <&sc16is750_clk>,"clock-frequency:0";
+	};
+};