// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "rt3883.dtsi" #include #include #include / { compatible = "engenius,esr600h", "ralink,rt3662-soc", "ralink,rt3883-soc"; model = "EnGenius ESR600H"; aliases { led-boot = &led_power; led-failsafe = &led_power; led-running = &led_power; led-upgrade = &led_power; }; leds { compatible = "gpio-leds"; led_power: power { function = LED_FUNCTION_POWER; color = ; gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; default-state = "on"; }; wps { function = LED_FUNCTION_WPS; color = ; gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; }; }; keys { compatible = "gpio-keys"; reset-wps { label = "reset-wps"; gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; linux,code = ; }; }; gpio_export { compatible = "gpio-export"; #size-cells = <0>; usb { gpio-export,name = "usb"; gpio-export,output = <1>; gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; }; }; }; &gpio1 { status = "okay"; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <20000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x1000>; }; partition@32000 { label = "config"; reg = <0x32000 0xe000>; read-only; }; partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x200>; }; eeprom_factory_8000: eeprom@8000 { reg = <0x8000 0x200>; }; }; }; partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x50000 0x7b0000>; }; }; }; }; &state_default { gpio { groups = "i2c", "jtag", "uartf"; function = "gpio"; }; }; ðernet { status = "okay"; port@0 { phy-handle = <&phy0>; phy-mode = "rgmii"; }; mdio-bus { status = "okay"; phy0: ethernet-phy@0 { reg = <0>; phy-mode = "rgmii"; qca,ar8327-initvals = < 0x04 0x07600000 /* PORT0 PAD MODE CTRL */ 0x0c 0x07600000 /* PORT6 PAD MODE CTRL */ 0x10 0x40000000 /* Power-on Strapping: 176-pin interface configuration */ 0x50 0xc437c437 /* LED Control Register 0 */ 0x54 0xc337c337 /* LED Control Register 1 */ 0x58 0x00000000 /* LED Control Register 2 */ 0x5c 0x03ffff00 /* LED Control Register 3 */ 0x7c 0x0000007e /* PORT0_STATUS */ 0x94 0x0000007e /* PORT6 STATUS */ >; }; }; }; &pci { status = "okay"; }; &pci1 { status = "okay"; wifi@0,0 { compatible = "pci1814,3091"; reg = <0x10000 0 0 0 0>; ralink,5ghz = <0>; nvmem-cells = <&eeprom_factory_8000>; nvmem-cell-names = "eeprom"; }; }; &wmac { ralink,2ghz = <0>; nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; }; &ehci { status = "okay"; }; &ohci { status = "okay"; };