// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "mt7621.dtsi" #include #include #include / { compatible = "snr,snr-cpe-me2-lite", "mediatek,mt7621-soc"; model = "SNR-CPE-ME2-Lite"; leds { compatible = "gpio-leds"; led_sys: led-0 { label = "green:sys"; color = ; function = LED_FUNCTION_STATUS; gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; }; led_vpn: led-1 { label = "green:vpn"; color = ; function = LED_FUNCTION_STATUS; gpios = <&gpio 14 GPIO_ACTIVE_LOW>; }; }; keys { compatible = "gpio-keys"; reset { label = "reset"; gpios = <&gpio 18 GPIO_ACTIVE_LOW>; linux,code = ; }; }; }; &state_default { gpio { groups = "jtag", "wdt"; function = "gpio"; }; }; &gdma { status = "okay"; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <104000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "config"; reg = <0x30000 0x10000>; }; factory: partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x400>; }; eeprom_factory_8000: eeprom@8000 { reg = <0x8000 0x4da8>; }; macaddr_factory_e000: macaddr@e000 { reg = <0xe000 0x6>; }; macaddr_factory_e006: macaddr@e006 { reg = <0xe006 0x6>; }; }; }; partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x50000 0xfb0000>; }; }; }; }; &sdhci { status = "okay"; }; &mdio { ethphy0: ethernet-phy@0 { reg = <0>; }; }; &gmac0 { nvmem-cells = <&macaddr_factory_e000>; nvmem-cell-names = "mac-address"; }; &gmac1 { status = "okay"; label = "wan"; phy-handle = <ðphy0>; nvmem-cells = <&macaddr_factory_e006>; nvmem-cell-names = "mac-address"; }; &switch0 { ports { port@1 { status = "okay"; label = "lan1"; }; port@2 { status = "okay"; label = "lan2"; }; port@3 { status = "okay"; label = "lan3"; }; port@4 { status = "okay"; label = "lan4"; }; }; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; ieee80211-freq-limit = <2400000 2500000>; }; }; &pcie1 { wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; nvmem-cells = <&eeprom_factory_8000>; nvmem-cell-names = "eeprom"; ieee80211-freq-limit = <5000000 6000000>; }; };