From 587b4b1f3c0d6795440fe02624a5d553fc7af817 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Mon, 26 Oct 2020 14:03:35 +0000 Subject: [PATCH 0482/1085] xhci: quirks: add link TRB quirk for VL805 The VL805 controller can't cope with the TR Dequeue Pointer for an endpoint being set to a Link TRB. The hardware-maintained endpoint context ends up stuck at the address of the Link TRB, leading to erroneous ring expansion events whenever the enqueue pointer wraps to the dequeue position. If the search for the end of the current TD and ring cycle state lands on a Link TRB, move to the next segment. Link: https://github.com/raspberrypi/linux/issues/3919 [6.5.y Fixup - move downstream quirk bits further along] Signed-off-by: Jonathan Bell --- drivers/usb/host/xhci-pci.c | 1 + drivers/usb/host/xhci-ring.c | 9 +++++++++ drivers/usb/host/xhci.h | 3 +++ 3 files changed, 13 insertions(+) --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -493,6 +493,7 @@ static void xhci_pci_quirks(struct devic if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; + xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; } if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -728,6 +728,15 @@ static int xhci_move_dequeue_past_td(str } while (!cycle_found || !td_last_trb_found); deq_found: + /* + * Quirk: the xHC does not correctly parse link TRBs if the HW Dequeue + * pointer is set to one. Advance to the next TRB (and next segment). + */ + if (xhci->quirks & XHCI_AVOID_DQ_ON_LINK && trb_is_link(new_deq)) { + if (link_trb_toggles_cycle(new_deq)) + new_cycle ^= 0x1; + next_trb(xhci, ep_ring, &new_seg, &new_deq); + } /* Don't update the ring cycle state for the producer (us). */ addr = xhci_trb_virt_to_dma(new_seg, new_deq); --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1662,6 +1662,9 @@ struct xhci_hcd { #define XHCI_WRITE_64_HI_LO BIT_ULL(47) #define XHCI_CDNS_SCTX_QUIRK BIT_ULL(48) +/* Downstream VLI fixes */ +#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(56) + unsigned int num_active_eps; unsigned int limit_active_eps; struct xhci_port *hw_ports;