#include "sf21.dtsi"
/ {
	compatible = "siflower,sf21h8898";
	soc {
		xgmac5: ethernet@8014000 {
			compatible = "siflower,sf21-xgmac";
			reg = <0x0 0x8014000 0x0 0x4000>;
			dmas = <&edma>;
			ethsys = <&ethsys>;
			clocks = <&topcrm CLK_SERDES_CSR>, <&topcrm CLK_GMAC_BYP_REF>;
			clock-names = "csr", "rgmii";
			phy-mode = "rgmii";
			pinctrl-names = "default";
			pinctrl-0 = <&rgmii_pins>;
			interrupts = <5 IRQ_TYPE_LEVEL_HIGH>, <25 IRQ_TYPE_LEVEL_HIGH>, <31 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "sbd", "lpi", "pmt";
			status = "disabled";
		};
	};
};

&cpus {
	timebase-frequency = <1250000000>;
};

&topcrm {
	assigned-clocks = <&topcrm CLK_CMNPLL_VCO>, <&topcrm CLK_PIC>, <&topcrm CLK_AXI>,
		<&topcrm CLK_AHB>, <&topcrm CLK_APB>, <&topcrm CLK_UART>,
		<&topcrm CLK_IRAM>, <&topcrm CLK_NPU>, <&topcrm CLK_ETHTSU>,
		<&topcrm CLK_GMAC_BYP_REF>, <&topcrm CLK_USB>, <&topcrm CLK_USBPHY>,
		<&topcrm CLK_SERDES_CSR>, <&topcrm CLK_CRYPT_CSR>, <&topcrm CLK_CRYPT_APP>,
		<&topcrm CLK_IROM>;
	assigned-clock-rates = <2500000000>, <416666666>, <416666666>,
		<250000000>, <178571428>, <89285714>,
		<416666666>, <416666666>, <89285714>,
		<250000000>, <250000000>, <50000000>,
		<89285714>, <73529411>, <312500000>,
		<312500000>;
};