Commit Graph

20 Commits

Author SHA1 Message Date
Furong Xu
314af7018a rockchip: make SMP affinity of RTL8152 on XHCI more robust
XHCI bus numbers are assigned dynamically, it may varies among boards,
match the device irq name with regexp, drop the hardcoded name.

Signed-off-by: Furong Xu <xfr@outlook.com>
2023-12-15 18:02:43 +01:00
Furong Xu
1438bc583c rockchip: fix eth1 irq affinity
NanoPi R2S and some other RK3328 boards use RTL8152 as eth1,
which is connected to xhci-hcd:usb1 but not xhci-hcd:usb3

|:~# cat /proc/interrupts
|           CPU0       CPU1       CPU2       CPU3
| 11:      53449     171813     129595      87823     GICv2  30 Level     arch_timer
| 18:          0          0          0          0     GICv2  94 Level     rockchip_usb2phy
| 19:          0          0          0          0     GICv2  32 Level     ff1f0000.dma-controller
| 20:          0          0          0          0     GICv2  33 Level     ff1f0000.dma-controller
| 21:          4          0          0          0     GICv2  89 Level     ttyS2
| 22:          0          0          0          0     GICv2  43 Level     ff350800.iommu
| 23:          0          0          0          0     GICv2 106 Level     ff360480.iommu
| 24:          0    1417932          0          0     GICv2  56 Level     eth0
| 25:        334          0          0    4422194     GICv2  99 Level     xhci-hcd:usb1
| 26:          0          0          0          0     GICv2  48 Level     ehci_hcd:usb3
| 27:          0          0          0          0     GICv2  49 Level     ohci_hcd:usb2
| 28:       3285          0          0          0     GICv2  69 Level     ff160000.i2c
| 29:          0          0          0          0  rockchip_gpio_irq  24 Level     rk805
| 30:          0          0          0          0     rk805   0 Edge      rk805_pwrkey_fall
| 35:          0          0          0          0     rk805   5 Edge      RTC alarm
| 37:          0          0          0          0     rk805   7 Edge      rk805_pwrkey_rise
| 38:          0          0          0          0     GICv2  90 Level     rockchip_thermal
| 39:          0          0          0          0     GICv2  72 Edge      ff1a0000.watchdog
| 40:       2601          0          0          0     GICv2  44 Level     dw-mci
| 41:          0          0          0          0  rockchip_gpio_irq   0 Edge      keys
|IPI0:      1559       1208        893       1131       Rescheduling interrupts
|[...]

Fix 40-net-smp-affinity to match the correct device irq name.

Signed-off-by: Furong Xu <xfr@outlook.com>
2023-12-12 19:50:43 +01:00
Tianling Shen
4e09722a68 rockchip: add NanoPi R5C support
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
1GB or 4GB LPDDR4X RAM
2x 2500 Base-T
4 LEDs (LAN / WAN / WIFI / POWER)
1 Button (Reset)
8GB or 32GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-11-26 19:44:56 +01:00
Tianling Shen
c06a71f0b3 rockchip: add NanoPi R5S support
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
2GB or 4GB LPDDR4X RAM
1x 1000 Base-T
2x 2500 Base-T
4 LEDs (LAN1 / LAN2 / WAN / POWER)
8GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Tested-by: Packet Please <pktpls@systemli.org>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-11-26 19:44:56 +01:00
Tianling Shen
d312f12b1a rockchip: fix setup network config for nanopi r2c
Without it the WAN port won't be initialized properly.

Fixes: 8f578c15b3 ("rockchip: add NanoPi R2C support")
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-06-17 12:20:10 +02:00
Tianling Shen
32d5921b8b rockchip: add Orange Pi R1 Plus LTS support
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.

Tested-by: Volkan Yetik <no3iverson@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-31 21:41:46 +02:00
Tianling Shen
ab641efe69 rockchip: add Orange Pi R1 Plus support
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.

This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.

Note: booting from SPI is currently unsupported, you have to install
the image on a SD card.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-31 21:41:46 +02:00
Tianling Shen
8f578c15b3 rockchip: add NanoPi R2C support
The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-18 17:42:53 +02:00
Jan-Niklas Burfeind
c7d3bbb909 sunxi: ensure NanoPi R1 has unique MAC address
Ensure the MAC address for all NanoPi R1 boards is assigned uniquely for
each board.

The vendor ships the device in two variants; one with and one without
eMMC; but both without static mac-addresses.
In order to assign both board types unique MAC addresses, fall back on
the same method used for the NanoPi R2S and R4S in case the EEPROM
chip is not present by generating the board MAC from the SD card CID.

[0] https://wiki.friendlyelec.com/wiki/index.php/NanoPi_R1#Hardware_Spec

Similar too and based on:

commit b5675f500d ("rockchip: ensure NanoPi R4S has unique MAC address")

Co-authored-by: David Bauer <mail@david-bauer.net>
Signed-off-by: Jan-Niklas Burfeind <git@aiyionpri.me>
2022-12-25 02:27:55 +01:00
David Bauer
b5675f500d rockchip: ensure NanoPi R4S has unique MAC address
Ensure the MAC address for all NanoPi R4S boards is assigned unique for
each board.

FriendlyElec ship two versions of the R4S: The standard as well as the
enterprise edition with only the enterprise edition including the EEPROM
chip that stores the unique MAC address.

In order to assign both board types unique MAC addresses, fall back on
the same method used for the NanoPi R2S in case the EEPROM chip is not
present by generating the board MAC from the SD card CID.

[0] https://wiki.friendlyelec.com/wiki/index.php/NanoPi_R4S#Differences_Between_R4S_Standard_Version_.26_R4S_Enterprise_Version

Signed-off-by: David Bauer <mail@david-bauer.net>
2022-09-10 01:54:40 +02:00
Ronny Kotzschmar
9b00e97956
rockchip: reliably distribute net interrupts
On the NanoPI R4S it takes an average of 3..5 seconds for the network devices
to appear in '/proc/interrupts'.
Wait up to 10 seconds to ensure that the distribution of the interrupts
really happens.

Signed-off-by: Ronny Kotzschmar <ro.ok@me.com>
2022-07-07 13:13:26 +02:00
Tianling Shen
b721579842 rockchip: add NanoPi R4S support
Hardware
--------
RockChip RK3399 ARM64 (6 cores)
4GB LPDDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

=====================================
NOTICE FOR USERS WHO USE 1GB VERSION:
     BY NOW IT IS NOT SUPPORTED
====================================

[initialed target]
Co-developed-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[fixed bootscript]
Co-developed-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-06-10 10:34:44 +02:00
Adrian Schmutzler
6f648ed7e6 treewide: remove "+" sign for increment with macaddr_add
Many people appear to use an unneeded "+" prefix for the increment
when calculating a MAC address with macaddr_add. Since this is not
required and used inconsistently [*], just remove it.

[*] As a funny side-fact, copy-pasting has led to almost all
    hotplug.d files using the "+", while nearly all of the
    02_network files are not using it.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-06-05 23:54:37 +02:00
David Bauer
eb85ab9ab6 rockchip: use alternative CID path
Use an alternative path to access the CID of the SD card in MMC0, used
for the generation of MAC addresses. With Kernel 5.10, the device name
of the MMC controller changed, breaking MAC address generation.

The new path is compatible with Kernel 5.4 as well as Kernel 5.10.

Signed-off-by: David Bauer <mail@david-bauer.net>
2021-04-18 14:41:51 +02:00
Adrian Schmutzler
85b1f4d8ca treewide: remove execute bit and shebang from board.d files
So far, board.d files were having execute bit set and contained a
shebang. However, they are just sourced in board_detect, with an
apparantly unnecessary check for execute permission beforehand.

Replace this check by one for existance and make the board.d files
"normal" files, as would be expected in /etc anyway.

Note:

This removes an apparantly unused '#!/bin/sh /etc/rc.common' in
target/linux/bcm47xx/base-files/etc/board.d/01_network

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-03-06 11:30:06 +01:00
David Bauer
a8a17fd223 rockchip: use stable MAC-address for NanoPi R2S
The NanoPi R2S does not have a board specific MAC address written inside
e.g. an EEPROM, hence why it is randomly generated on first boot.

The issue with that however is the lack of a driver for the PRNG.
It often results to the same MAC address used on multiple boards by
default, as urngd is not active at this early stage resulting in low
available entropy.

There is however a semi-unique identifier available to us, which is the
CID of the used SD card. It is unique to each SD card, hence we can use
it to generate the MAC address used for LAN and WAN.

Signed-off-by: David Bauer <mail@david-bauer.net>
2021-01-18 17:32:52 +01:00
Adrian Schmutzler
84fc80dd66 rockchip: remove useless echo in 40-net-smp-affinity
The command in the $() brackets will already provide the same output.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-08-17 23:13:57 +02:00
David Bauer
7a4fc8906c rockchip: distribute net interrupts
This adds a hotplug script for distributing interrupts of eth0 and eth1
across different cores. Otherwise the forwarding performance between
eth0 and eth1 is severely affected.

The existing SMP distribution mechanic in OpenWrt can't be used here, as
the actual device IRQ has to be moved to dedicated cores. In case of
eth1, this is in fact the USB3 controller.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-07-28 15:52:44 +02:00
David Bauer
b7a9a183fb rockchip: add NanoPi R2S support
Hardware
--------
RockChip RK3328 ARM64 (4 cores)
1GB DDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
USB 2.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

MAC-address
-----------
The vendor code supports reading a MAC address from an EEPROM connected
via i2c0 of the SoC. The EEPROM (address 0x51) should contain the MAC
address in binary at offset 0xfa. However, my two units didn't come with
such an EEPROM soldered on. The EEPROM should be placed between the SoC
and the GPIO pins on the board. (U10)

Generating rendom MAC addresses works around this issue. Otherwise, all
boards running the same image have identical MAC addresses.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-07-28 15:52:44 +02:00
Tobias Mädel
6a05a85dcb rockchip: add support for Pine64 RockPro64
This adds the new rockchip target and support for RockPro64 RK3399

Flash:    16 MiB SPI NOR
RAM:      2 GiB/4 GiB LPDDR4
SoC:      RK3399
USB:      2x USB 2.0, 1x USB 3.0, 1x USB-C
Ethernet: 1x GbE
PCIe:     PCIe 2.0, 4 lanes
Storage:  eMMC or SD card
Optional SDIO wifi/bt module

The Pine64 RockPro64 is a single-board-computer with a 4x PCIe connector,
6 ARM64 cores (4 little, 2 big), plenty of RAM and storage.

By default the single Gigabit-Ethernet port is configured as the
LAN port.

Installation of the firware is possible by dd'ing the image
to an SD card or the eMMC flash.

Serial: 3v3 1500000 8n1

U-boot is build from the mainline tree and
integrated into the images. Required ATF to build u-boot
is downloaded from a CI build bot.

Signed-off-by: Tobias Mädel <t.maedel@alfeld.de>
Tested-by: Tobias Schramm <t.schramm@manjaro.org>
2020-04-20 16:37:56 +02:00