It backports this patch series, which is currently on review:
https://lore.kernel.org/linux-leds/20220704105955.15474-1-kabel@kernel.org/T/#rb89a4ca5a836f17bdcc53d65549e0b1779bb6a18
It allows being able to configure LEDs in userspace.
This fixes issue described in Turris Build repository
https://gitlab.nic.cz/turris/os/build/-/issues/354
It happens in OpenWrt as well.
- Before
```
root@turris:/# ls /sys/class/leds/
ath10k-phy0 ath9k-phy1 mmc0::
```
-After
```
root@turris:/# ls /sys/class/leds/
ath10k-phy0 rgb:indicator-2 rgb:lan-3 rgb:wlan-1
ath9k-phy1 rgb:lan-0 rgb:lan-4 rgb:wlan-2
mmc0:: rgb:lan-1 rgb:power rgb:wlan-3
rgb:indicator-1 rgb:lan-2 rgb:wan
```
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
(cherry picked from commit 049368b936)
Add support for LEDs of the CZ.NIC Turris Omnia using the upstream
driver.
There is no generic way to control the LEDs in UCI manner, however
the kernel module is the first step to actually use the RGB LEDs in
custom logic.
Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de>
(removed DMARC notice, added driver to Turris Omnia, moved module
recipe to target/linux/mvebu/modules.mk)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit f8fa38c13f)
Reviewed-by: Robert Marko <robimarko@gmail.com>
The line trying to generate the standard sdcard.img.gz fails due to
boot.scr not being generated.
Remove the line in order to use the default sdcard.img.gz which is
exactly the same but includes generating the boot.scr file.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 1d3b57dbee)
This is now built-in, enable so it won't propagate on target configs.
Link: https://lkml.org/lkml/2022/1/3/168
Fixes: 79e7a2552e ("kernel: bump 5.15 to 5.15.44")
Fixes: 0ca9367069 ("kernel: bump 5.10 to 5.10.119")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
(Link to Kernel's commit taht made it built-in,
CRYPTO_LIB_BLAKE2S[_ARM|_X86] as it's selectable, 5.10 backport)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit 539e60539a)
This enables armv8 crypto extensions version of AES, GHASH, SHA1,
SHA256, and SHA512 algorithms in the kernel.
The choice of algorithms match the 32-bit versions that are enabled in
the target config-5.10 file, but were only used by the cortexa9
subtarget.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
(cherry picked from commit 06bb5ac1f2)
This is result of a plain make kernel_oldconfig CONFIG_TARGET=subtarget.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
(cherry picked from commit 39b6af1147)
This enables armv8 crypto extensions version of AES, GHASH, SHA1,
SHA256, and SHA512 algorithms in the kernel.
The choice of algorithms match the 32-bit versions that are enabled in
the target config-5.10 file, but were only used by the cortexa9
subtarget.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
(cherry picked from commit f5167e11bf)
This is result of a plain make kernel_oldconfig CONFIG_TARGET=subtarget.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
(cherry picked from commit a4c6384d93)
uDPU provides a FIT based initramfs, but currently gets stuck after U-boot
starts the kernel at "Starting kernel..".
It is due to the load address being too low, so increase it in order to get
the initramfs booting again.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 80f21e5336)
uDPU has 2 LM75 compatible temperature sensors, so include the driver for
them by default in order to utilize them.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit a8b2d35903)
Enable support for allocating user space page table entries in high memory [1],
for the targets which support this feature. This saves precious low memory
(permanently mapped, the only type of memory directly accessible by the kernel).
[1] https://www.kernel.org/doc/html/latest/vm/highmem.html
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Adding the feature flag automatically creates a a rootfs.tar.gz files
which can be used for Docker rootfs containers.
Signed-off-by: Paul Spooren <mail@aparcar.org>
Enable the AP806's cpufreq driver. This driver is compatible with the
Armada 7K and 8K platforms.
Tested-by: Stijn Segers <foss@volatilesystems.org> (RB5009UG+S+IN)
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
On this device, two of the three defined MTD partitions are
automatically set to read-only, since they do not end at an
erase/write block boundary.
In particular, the only partition remaining writable is the
one holding the u-boot bootloader.
Mark all of the partitions read-only, at least until a better
understanding of why the layout has been laid out this way is
gained.
Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
The option is already enabled in the target config since 9149ed4f05
("mvebu: cortexa9: Add support for Ctera C200-V2").
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Fix syntax error in the case statement
Fixes: 9149ed4f05 ("mvebu: cortexa9: Add support for Ctera C200-V2")
Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com>
Move config options
CONFIG_PHY_MVEBU_A38X_COMPHY
CONFIG_RTC_DRV_MV
to cortexa9/config-5.10.
These are not needed for arm64 targets.
Signed-off-by: Marek Behún <kabel@kernel.org>
This option includes support for watchdog timer on Marvell Armada 37xx
SoCs. [1] It is useful e.g. for Turris MOX, Marvell ESPRESSObin
Enable armada-37xx-watchdog driver as built in for mvebu cortex-a53,
so that kernel can start serving as soon as the driver is probed, until userspace takes over it.
[1] https://cateee.net/lkddb/web-lkddb/ARMADA_37XX_WATCHDOG.html
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
(improved commit message, 2nd paragraph)
Signed-off-by: Marek Behún <kabel@kernel.org>
Enabling Armada 37xx rWTM driver. This gives the kernel access to random
number generator, if provided by the rWTM firmware.
Note that the driver is called turris-mox-rwtm because it was initially
written for Turris MOX, but will also work on other Armada 37xx
platforms, if they use rWTM firmware from CZ.NIC [1].
It makes sense to have this driver built-in, so that kernel has access
to random number generator without needing to load any drivers.
[1] https://gitlab.nic.cz/turris/mox-boot-builder
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andre Heider <a.heider@gmail.com>
CONFIG_BLK_DEV_NVME [1]:
- This is a kernel driver for SSD connected to PCI or PCIe bus [1].
By default, it is enabled for targets "ipq807x", "rockchip/armv8"
and "x86/64".
With miniPCIe adapter, there is a possibility to connect NVMe disk
to Turris Omnia (cortex-a9), Turris MOX (cortex-a53).
It allows to boot system from NVMe disk, because of that it can not
be kmod package as you can not access the disk to be able to boot from
it.
CONFIG_NVME_CORE [2]:
- This is selected by CONFIG_BLK_DEV_NVME
It does not need to be explicitly enabled, but it is done for "ipq807",
"x64_64" and rockchip/armv8", which has also enabled the previous config
option as well.
Kernel increase: ~28k KiB on mamba kernel
Reference:
[1] https://cateee.net/lkddb/web-lkddb/BLK_DEV_NVME.html
[2] https://cateee.net/lkddb/web-lkddb/NVME_CORE.html
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
Fix default network configuration of the Puzzle-M902 so all LAN ports
are included in the LAN bridge.
Setup network LED to indicate WAN port link status, like vendor
firmware does as well.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Fixes Ethernet link status on all ports and makes 2.5G ports usable
in 2.5G and 1G full-duplex mode.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Wire up MCU driver for LEDs, fan and temperature sensor, and add
GPIO reset button just like on the M902 also on the Puzzle M901.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Set blinking mode using scheduled work instead of blocking which may
result in deadlocks.
Add dynamic kprintf debugging hexdumps of all MCU rx and tx.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport MFD driver for communicating with the on-board MCU found on
IEI World Puzzle appliances.
Improve the driver to support multiple LEDs, apply a default state and
let MCU take care of blinking if timing is within supported range.
Wire up LEDs and fan for Puzzle M902 in device tree.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Each of
- CRYPTO_AEAD2
- CRYPTO_AEAD
- CRYPTO_GF128MUL
- CRYPTO_GHASH
- CRYPTO_HASH2
- CRYPTO_HASH
- CRYPTO_MANAGER2
- CRYPTO_MANAGER
- CRYPTO_NULL2
either directly required for mac80211 crypto support, or directly
selected by such options. Support for the mac80211 crypto was enabled in
the generic config since c7182123b9 ("kernel: make cryptoapi support
needed by mac80211 built-in"). So move the above options from the target
configs to the generic config to make it clear why do we need them.
CC: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Both CLANG_VERSION and LLD_VERISON are autogenerated runtime
configuration options, so add them to the kernel configuration filter
and remove from generic and per-target configs to keep configs clean.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
The recent changes to the maximum kernel size for Mamba and Venom
highlighted the fact that the old Mamba kernel size has been
hardcoded in linksys_get_root_magic() even for devices with
a different kernel/rootfs split.
The purpose of this code seems to be to avoid issues caused
by partially overwriting an existing UBI partition, where some
of the erase counters would be reset but not the unmodified
ones. This problem has been solved in a more generic way by
the UBI EOF marker. This ensures that any old PEBs after the
marker are properly initialized. It is therefore unnecessary
to erase the whole partition before flashing a new OpenWrt
factory image.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Implement a basic MQPrio support, inserting rules in RX that translate
the TC to prio mapping into vlan prio to queues.
Signed-off-by: Kabuli Chana <newtownBuild@gmail.com>
Deleted (upstreamed):
bcm27xx/patches-5.10/950-0145-xhci-add-quirk-for-host-controllers-that-don-t-updat.patch [1]
Manually rebased:
bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
Note: although automatically rebaseable, the last patch has been edited to avoid
conflicting bit definitions.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.10.y&id=b6f32897af190d4716412e156ee0abcc16e4f1e5
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
LED labels got reversed by accident, so fix it to the usual color:led_name format.
Fixes: 78cf3e53b1 ("mvebu: add Globalscale MOCHAbin")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
[add Fixes:]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Globalscale MOCHAbin is a Armada 7040 based development board.
Specifications:
* Armada 7040 Quad core ARMv8 Cortex A-72 @ 1.4GHz
* 2 / 4 / 8 GB of DDR4 DRAM
* 16 GB eMMC
* 4MB SPI-NOR (Bootloader)
* 1x M.2-2280 B-key socket (for SSD expansion, SATA3 only)
* 1x M.2-2250 B-key socket (for modems, USB2.0 and I2C only)
* 1x Mini-PCIe 3.0 (x1, USB2.0 and I2C)
* 1x SATA 7+15 socket (SATA3)
* 1x 16-pin (2×8) MikroBus Connector
* 1x SIM card slot (Connected to the mini-PCIe and both M.2 slots)
* 2x USB3.0 Type-A ports via SMSC USB5434B hub
* Cortex 2x5 JTAG
* microUSB port for UART (PL2303GL/PL2303SA onboard)
* 1x 10G SFP+
* 1x 1G SFP (Connected to 88E1512 PHY)
* 1x 1G RJ45 with PoE PD (Connected to 88E1512 PHY)
* 4x 1G RJ45 ports via Topaz 88E6141 switch
* RTC with battery holder (SoC provided, requires CR2032 battery)
* 1x 12V DC IN
* 1x Power switch
* 1x 12V fan header (3-pin, power only)
* 1x mini-PCIe LED header (2x0.1" pins)
* 1x M.2-2280 LED header (2x0.1" pins)
* 6x Bootstrap jumpers
* 1x Power LED (Green)
* 3x Tri-color RGB LEDs (Controllable)
* 1x Microchip ATECC608B secure element
Note that 1G SFP and 1G WAN cannot be used at the same time as they are in
parallel connected to the same PHY.
Installation:
Copy dtb from build_dir to bin/ and run tftpserver there:
$ cp ./build_dir/target-aarch64_cortex-a72_musl/linux-mvebu_cortexa72/image-armada-7040-mochabin.dtb bin/targets/mvebu/cortexa72/
$ in.tftpd -L -s bin/targets/mvebu/cortexa72/
Connect to the device UART via microUSB port and power on the device.
Power on the device and hit any key to stop the autoboot.
Set serverip (host IP) and ipaddr (any free IP address on the same subnet), e.g:
$ setenv serverip 192.168.1.10 # Host
$ setenv ipaddr 192.168.1.15 # Device
Set the ethernet device (Example for the 1G WAN):
$ setenv ethact mvpp2-2
Ping server to confirm network is working:
$ ping $serverip
Using mvpp2-2 device
host 192.168.1.15 is alive
Tftpboot the firmware:
$ tftpboot $kernel_addr_r openwrt-mvebu-cortexa72-globalscale_mochabin-initramfs-kernel.bin
$ tftpboot $fdt_addr_r image-armada-7040-mochabin.dtb
Boot the image:
$ booti $kernel_addr_r - $fdt_addr_r
Once the initramfs is booted, transfer openwrt-mvebu-cortexa72-globalscale_mochabin-squashfs-sdcard.img.gz
to /tmp dir on the device.
Gunzip and dd the image:
$ gunzip /tmp/openwrt-mvebu-cortexa72-globalscale_mochabin-squashfs-sdcard.img.gz
$ dd if=/tmp/openwrt-mvebu-cortexa72-globalscale_mochabin-squashfs-sdcard.img of=/dev/mmcblk0 && sync
Reboot the device.
Hit any key to stop the autoboot.
Reset U-boot env and set the bootcmd:
$ env default -a
$ setenv bootcmd 'load mmc 0 ${loadaddr} boot.scr && source ${loadaddr}'
Optionally I would advise to edit the console env variable to remove earlycon as that
causes the kernel to never use the driver for the serial console.
Earlycon should be used only for debugging before the kernel can configure the console
and will otherwise cause various issues with the console.
$ setenv console 'console=ttyS0,115200'
Save and reset
$ saveenv
$ reset
OpenWrt should boot from eMMC now.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
1. Add support for Marvell CN9130 SoC
2. Add support for CP115,and create an armada-cp11x.dtsi file which will be used to instantiate both CP110 and CP115
3. Add support for AP807/AP807-quad,AP807 is a major component of CN9130 SoC series
4. Drop PCIe I/O ranges from CP11x file and externalize PCIe macros from CP11x file
Signed-off-by: Ian Chang <ianchang@ieiworld.com>
It's been brewing on my cortexa9 subtarget (Turris Omnia) for months.
Perfectly stable.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
[modify subject to match previous updates]
Signed-off-by: Paul Spooren <mail@aparcar.org>
