Arduino Yun is a microcontroller development board, based on Atmel
ATmega32u4 and Atheros AR9331.
Specifications:
- MCU: ATmega32U4
- SoC: AR9331
- RAM: DDR2 64MB
- Flash: SPI NOR 16MB
- WiFi:
- 2.4GHz: SoC internal
- Ethernet: 1x 10/100Mbps
- USB: 1x 2.0
- MicroSD: 1x SDHC
Notes:
- Stock firmware is based on OpenWrt AA.
- The SoC UART can be accessed only through the MCU.
YunSerialTerminal is recommended for access to serial console.
- Stock firmware uses non-standard 250000 baudrate by default.
- The MCU can be reprogrammed from the SoC with avrdude linuxgpio.
Installation:
1. Update U-Boot environment variables to adapt to new partition scheme.
> setenv bootcmd "run addboard; run addtty; run addparts; run addrootfs; bootm 0x9f050000 || bootm 0x9fea0000"
> setenv mtdparts "spi0.0:256k(u-boot)ro,64k(u-boot-env),15936k(firmware),64k(nvram),64k(art)ro"
> saveenv
2. Boot into stock firmware normally and perform sysupgrade with
sysupgrade image.
# sysupgrade -n -F /tmp/sysupgrade.bin
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Fixes:
- CVE-2020-10757
The "mtd: rawnand: Pass a nand_chip object to nand_release()" commit was
backported which needed some adaptations to other code.
Run tested: ath79
Build tested: ath79
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This adds 3 Mikrotik rb4xx series drivers as follows:
rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device
that interfaces between the SoC SPI bus and its two children below.
rb4xx-gpio: This is the GPIO expander.
rb4xx-nand: This is the NAND driver.
The history of this code comes in three phases.
1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx
drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/.
Module-author: Gabor Juhos <juhosg@openwrt.org>
Module-author: Imre Kaloz <kaloz@openwrt.org>
Module-author: Bert Vermeulen <bert@biot.com>
2. Next several ar71xx patches were applied bringing the code current.
commit 7bbf4117c6
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
commit af79fdbe4a
commit 889272d92d
commit e21cb649a2
commit 7c09fa4a74
Signed-off-by: Felix Fietkau <nbd@nbd.name>
3. Finally a heavy refactor to split the driver into the three new
subsystems, and updated to work with the device tree configuration, plus
updates and review feedback incorporated
Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org>
Signed-off-by: Christopher Hill <ch6574@gmail.com>
This is only a cosmetic correction, as the driver works as expected.
However, the error message confuses users about a missing reset definition.
On a defered init we don't see the following error message now:
[ 0.078292] ar7200-usb-phy usb-phy: phy reset is missing
Tested-by: Lech Perczak <lech.perczak@gmail.com>
Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
This parser was added with the target, but no device seems to use it
currently, as all partitions are specified in the device-tree.
Signed-off-by: David Bauer <mail@david-bauer.net>
Between 4.19 and 5.4, mtd parsers have been moved to "parsers"
subdirectory. Like for myloader.c in the previous patch,
this patch moves tplinkpart.c to the kernel patches, so the
code and the kernel includes are at the same location and
the path can be adjusted per kernel.
While at it, remove some outdated kernel version switches from
the C code.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The QCA9550 family of SoCs have a slightly different reset
sequence compared to older chips.
Normally the bootloader performs this sequence, however
some bootloader implementation expect the operating system
to clear the reset. Also get the PCIe resets from OF to
support the second RC of the QCA9558.
This is required for the AVM FRITZ!WLAN Repeater 1750E to work,
as EVA leaves the PCIe bus in reset.
Tested: AVM FRITZ!WLAN Repeater 1750E - OCEDO Koala
Signed-off-by: David Bauer <mail@david-bauer.net>
Reimplements read optimization on top of spi-mem. Similar to
what 461-spi-ath79-add-fast-flash-read.patch used to do with
the dropped flash read interface.
It accelerate only fast-read op reading flash directly from
memory mapped region. 'm25p,fast-read' must be set in order
to use the new spi-mem.
It improved read speed up to 3x on old devices (tplink,tl-wr2543-v1)
while no speed improvement was noticed on newer devices like
(tplink,archer-c7-v2).
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Add support for RS485 tranceiver with transmit/receive switch hooked
to a RTS GPIO pin.
Use the 'rts-gpios' and 'rs485-rts-active-low' properties as described
in devicetree/bindings/serial/rs485.yaml.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The Siemens WS-AP3610 asserts reset to the ethernet PHY with the
reset-register. Backport the necessary patches to de-assert reset
when probing the PHY.
These patches can be dropped when using kernel 5.4.
Signed-off-by: David Bauer <mail@david-bauer.net>
If bootloader doesn't terminate its last spi operation properly
before starting kernel, our first transfer in kernel becomes a
continuous transfer to that request instead of a new one.
Fix this flaw by restoring IOC register, which restored all pin
state to default.
Fixes: ebf0d8dade ("ath79: add new ar934x spi driver")
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
AR934x chips also got the 'old' qca,ar9330-uart in addition to the
'new' ns16550a compatible one. Add support for UART1 clock selector as
well as device-tree bindings in ar934x.dtsi to make use of that uart.
Reported-by: Piotr Dymacz <pepe2k@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
On AR934x this UART is usually not initialized by the bootloader
as it is only used as a secondary serial port while the primary
UART is a newly introduced NS16550-compatible.
In order to make use of the ar933x-uart on AR934x without RTS/CTS
hardware flow control, one needs to set the
UART_CS_{RX,TX}_READY_ORIDE bits as other than on AR933x where this
UART is used as primary/console, the bootloader on AR934x typically
doesn't set those bits.
Setting them explicitely on AR933x does not do any harm, so just set
them unconditionally.
Tested-by: Chuanhong Guo <gch981213@gmail.com
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
A new shift mode was introduced since ar934x which has a way better
performance than current bitbang driver and can handle higher spi
clock properly. This commit adds a new driver to make use of this
new feature.
This new driver has chipselect properly configured and we don't need
cs-gpios hack in dts anymore. Remove them.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
In order to make the QCA955x SGMII workaround work, the unsuccessful
SGMII autonegotiation on the AR8033 should not block the PHY
state-machine.
Otherwise, the ag71xx driver never becomes aware of the copper-side
link-establishment and the workaround is never executed.
Signed-off-by: David Bauer <mail@david-bauer.net>
[remove one trailing whitespace per file]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit adds a workaround for the loss of the SGMII link observed on
the QCA955x generation of SoCs. The workaround originates part from the
U-Boot source code, part from the implementation from AVM found in the
GPL tarball for the AVM FRITZ!WLAN Repeater 450E.
The bug results in a stuck SGMII link between the PHY device and the SoC
side. This has only been observed with the Atheros AR8033 PHY and most
likely all devices using such combination are affected.
It is worked around by reading a hidden SGMII status register and
issuing a SGMII PHY reset until the link becomes useable again.
Signed-off-by: David Bauer <mail@david-bauer.net>
Do not put usb-phy into reset if clearing the usb-phy reset or
setting the suspend_override has failed.
Reorder (de)asserts like in arch/mips/ath79/dev-usb.c.
Add an optional reset_control "usb-phy-analog", which is needed for
ar934x SoCs like in the old mach-driver arch/mips/ath79/dev-usb.c.
Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
Currently the patch only changes break to use goto statement instead.
But not necessary acutually since the ret value checked after the for loop.
So it is okay for the break case before changed by the patch also.
This patch only reverts the following commit partially.
https://github.com/openwrt/openwrt/commit/ddc11c3932c7b7b7df7d5fbd48f207e7
Note: The changes are mainly applied into the linux kernel upstream.
Signed-off-by: Tokunori Ikegami <ikegami.t@gmail.com>
Cc: Koen Vandeputte <koen.vandeputte@ncentric.com>
Until upstream commit 6d4cd041f0af("net: phy: at803x: disable delay
only for RGMII mode"), delays were not disabled on driver probe
for the Atheros AR803x PHYs, although the RX delay is enabled on
soft and hard reset.
In addition, the TX delay setting is retained on soft-reset.
This patch disables both delays on config init to align the behavior
with kernel 5.1 and higher. It can be safely dropped with kernel 5.1.
Signed-off-by: David Bauer <mail@david-bauer.net>
This patch contains updated driver for Atheros NAND Flash Controller
written originally by Gabor Juhos for ar71xx (aka 'ar934x-nfc').
ath79 version has adapted to work with kernel 4.19 and Device Tree.
It has also been renamed to 'ar934x-nand' to avoid confusion with
Near-Field Communication technology.
Controller is present on Atheros AR934x SoCs and required for accessing
internal flash storage on routers like Netgear WNDR4300.
This port preserves all NAND programming code while moving platform
configuration to Device Tree and replacing some kernel functions marked
for retirement by 4.19.
Suitable definition is included in 'ar934x.dtsi' ('nand@1b000200' section).
Most important changes to ar71xx version are:
* old kernel sections of code removed
* 'bool swap_dma' provided by platform data is now set by boolean DT
property 'qca,nand-swap-dma'
* board-supplied (mach-*.c code) platform data removed - its elements
become either unused, redundant or replaced by DT methods (like reset)
* IRQ is reserved by devm_request_irq() so free_irq() is not needed anymore
* calls to deprecated nand_scan_ident() + nand_scan_tail() function pair
replaced by using recommended nand_scan() with attach_chip() callback
* ECC is set to hardware by default, can be overriden by standard DT
'nand-ecc-*' properties (software Hamming or BCH are other options)
This driver has been successfully tested on Netgear WNDR4300 running
experimental ath79 OpenWrt master branch.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
[add reset control]
Signed-off-by: David Bauer <mail@david-bauer.net>
When bumping to 4.19 the patch responsible for scaning flash for FIS
partition got left out. Without it devices with RedBoot bootloader using
automatic partitions detection in dts won't boot with the new kernel.
Fixes: 3771176 ("ath79: add support for linux 4.19")
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
Refreshed all patches.
Fixes:
- CVE-2019-11479
- CVE-2019-11478
- CVE-2019-11477
Also fix a malformed patch issue caught during refresh.
It was caused by removing a whitespace without altering
the index values in a patch which alters a patch.
Compile-tested on: cns3xxx
Runtime-tested on: cns3xxx
Fixes: cf65262492 ("kernel: bump 4.19 to 4.19.51")
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
The following patches are dropped because they are merged upstream:
-0001-tty-serial-drop-QCA-pecific-SoC-symbols.patch
-0006-usb-drop-deprecated-symbols.patch
-0009-MIPS-ath79-add-lots-of-missing-registers.patch
-0010-MIPS-ath79-add-support-for-QCA953x-QCA956x-TP9343.patch
-0014-MIPS-ath79-finetune-cpu-overrides.patch
-0015-MIPS-ath79-enable-uart-during-early_prink.patch
-0016-MIPS-ath79-get-PCIe-controller-out-of-reset.patch
This patch is dropped due to the introduction of spi-mem framework:
-461-spi-ath79-add-fast-flash-read.patch
Thank to Michael Marley @mamarley for his work on this patch:
-910-unaligned_access_hacks.patch
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[synchronized kernel config with make kernel_oldconfig]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
