The qca8081 phy needs to set the reset delay time,
otherwise it will not be detected by the mdio bus.
Fixes: 75ad5c2 ("qualcommax: switch to qca8081 upstream PHY driver")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Switch to qca8081 upstream PHY. Update every device that have LEDs
attached to the qca8081 PHY to follow new way of defining the LEDs and
add original OEM configuration.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport upstream patch adding more speed modes to LED netdev trigger.
Fixes: 2c39269b6e ("generic: 6.1: backport qca808x LED support patch")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport qca808x LED support patch merged upstream needed to drop
handling of it from the SSDK for ipq807x target.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport merged upstream patch that adds support for firmware loader
from NVMEM or attached filesystem for Aquantia PHYs.
Refresh all kernel patches affected by this change.
Also update the path for aquantia .ko that got moved to dedicated
directory upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
[rmilecki: port to 5.15]
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
They are unnecessary since ipq806x switched to DSA in
the commit 337e36e0ef.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Refresh HSGMII patch due to recent PHY backport that cause
compilation warning for case not handled in phy_interface_num_ports.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Refresh 2.5G-SGMII patch due to recent PHY backport that cause
compilation warning for case not handled in phy_interface_num_ports.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
In order to get rid of having to modify U-boot bootcmd and having U-boot
load the Aquantia PHY-s firmware lets use some of the free space on SPI-NOR
to add a second ethphyfw partition and be able to load AQR FW via NVMEM
cells.
Signed-off-by: Robert Marko <robimarko@gmail.com>
It seems that the reset GPIO-s defined for the two AQR PHY-s are actually
reversed.
Manually testing confirmed that GPIO44 is actually reset GPIO of AQR at 0,
while GPIO59 is reset of AQR at 8:
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now that we have support for firmware loading via the kernel driver, it
makes sense to populate the firmware name as well, so if its present the
driver can load it.
In later patches, loading the FW via NVMEM will be added as well.
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch adds support for Raspberry Pi 5.
Instead of using 16K pages like Raspberry Pi OS, OpenWrt uses 4K pages due to
incompatibilities with F2FS and other applications.
There are multiple RPi forum posts with different cases and users are forcing
kernel8.img to workaround them, which is the 64 bit kernel of the RPi 4.
However, this isn't possible in OpenWrt because we only ship one kernel and we
would have to add RPi 5 support to bcm2711 subtarget (RPi 4) for that
workaround to work in OpenWrt.
Specification:
- Processor Broadcom BCM2712 2.4GHz quad-core 64-bit Arm Cortex-A76 CPU,
with cryptographic extension, 512KB L2 caches per core, 2048KB L3 cache
Features:
- VideoCore VII GPU, supports OpenGL ES 3.1, Vulkan 1.2
- Dual 4Kp60 HDMI display output with HDR support 4Kp60 HEVC decoder
- LPDDR4X-4267 SDRAM 4GB and 8GB
- Dual-band 802.11ac Wi-Fi
- Bluetooth 5.0 / Bluetooth Low Energy
- microSD card slot, with support for SDR104 high-speed mode
- 2 x USB 3.0 ports
- 2 x USB 2.0 ports
- Gigabit Ethernet
- 2 x 4 lane MIPI camera/display
- PCIe 2.0 x1
- 5V/5A power via USB-C
- Raspberry Pi standard 40-pin header
- Real-time clock RTC
- Power button
Build system: x86_64
Build-tested: bcm2712
Run-tested: bcm2712/RPi5
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[Remove device variant, improve description]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Add support for BCM2712 (Raspberry Pi 5).
3bb5880ab3
Patches were generated from the diff between linux kernel branch linux-6.1.y
and rpi-6.1.y from raspberry pi kernel source:
- git format-patch linux-6.1.y...rpi-6.1.y
Build system: x86_64
Build-tested: bcm2708, bcm2709, bcm2710, bcm2711
Run-tested: bcm2710/RPi3B, bcm2711/RPi4B
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[Remove applied and reverted patches, squash patches and config commits]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Ubiquiti Rocket M XW is a single-band, 2x2:2 external Wi-Fi AP, with optional
GPS receiver, with two external RP-SMA antenna connections, based on
AR9342 SoC. Two band variants exists, for 2.4GHz and 5GHz band, usable
with the same image.
Specs:
- CPU: Atheros AR9342 MIPS SoC at 535MHz
- RAM: 64MB DDR400
- ROM: 8MB SPI-NOR in SO16W package, MX25L6408E
- Wi-Fi Atheros AR9342 built-in 2x2:2 radio
- Ethernet: Atheros AR8035 PHY, limited to 100Mbps speeds due to
magnetics
- Power: 24V passive PoE input.
Installation: please refer to Ubiquiti Bullet M2HP for documentation.
The device runs with exactly same image as the Bullet, and after fixes
in preceding commit, is fully functional again. Add the alternative name
to the build system.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Since commit 6f2e1b7485 ("ath79: disable delays on AT803X config init")
Ubiquiti XW boards equipped with AR8035 PHY suffered from lack of
outbound traffic on the Ethernet port. This was caused by the fact, the
U-boot has set this during boot and it wasn't reset by the PHY driver,
and the corresponding setting in device tree was wrong.
Set the 'phy-mode = "rgmii-txid"' at the ð0, and drop this property
from PHY node, as it is not parsed there. This causes the device to
connect using Ethernet once again.
Fixes: db4b6535f8 ("ath79: Add support for Ubiquity Bullet M (XW)")
Fixes: 6f2e1b7485 ("ath79: disable delays on AT803X config init")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Onboard AR8035 PHY supports 1000Base-T operation, but onboard
Ethernet magnetics do not. Reduce advertised link speeds to 100Mbps and
lower.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Add support for loading Aquantia FW from NVMEM for Zyxel NBG7815
restoring correct functionality of the 10g port.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add pending patch for ipq4019 MDIO MDC rate fix. The divisor was never
actually set resulting in the MDC rate running at a very low speed.
The same MDIO is used on ipq807x where Aquantia PHY are commonly used
where MDIO is used to load the PHY firmware. Running at higher speed is
required to make the firmware load faster as it does reduce load time
from 60+ second to 5-6 seconds.
Add as pending as upstream there seems to be some conflicts with quic
and me and it might take lots of time before this is effectively merged
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The safe max frame size for this ethernet switch is 1532 bytes,
excluding the DSA TAG and extra VLAN header, so the maximum
outgoing frame is 1542 bytes.
The available overhead is needed when using the DSA switch with
a cascaded Marvell DSA switch, which is something that exist in
real products, in this case the Inteno XG6846.
Use defines at the top of the size for max MTU so it is clear how
we think about this, add comments.
We need to adjust the RX buffer size to fit the new max frame size,
which is 1542 when the DSA tag (6 bytes) and VLAN header (4 extra
bytes) is added.
We also drop this default MTU:
#define ENETSW_TAG_SIZE (6 + VLAN_HLEN)
ndev->mtu = ETH_DATA_LEN + ENETSW_TAG_SIZE;
in favor of just:
ndev->mtu = ETH_DATA_LEN;
I don't know why the default MTU is trying to second guess the
overhead required by DSA and VLAN but the framework will also
try to bump the MTU for e.g. DSA tags, and the VLAN overhead is
not supposed to be included in the MTU, so this is clearly not
right.
Before this patch (on the lan1 DSA port in this case):
dsa_slave_change_mtu: master->max_mtu = 9724, dev->max_mtu = 10218, DSA overhead = 8
dsa_slave_change_mtu: master = extsw, dev = lan1
dsa_slave_change_mtu: master->max_mtu = 1510, dev->max_mtu = 9724, DSA overhead = 6
dsa_slave_change_mtu: master = eth0, dev = extsw
dsa_slave_change_mtu new_master_mtu 1514 > mtu_limit 1510
mdio_mux-0.1:00: nonfatal error -34 setting MTU to 1500 on port 0
My added debug prints before the nonfatal error: the first switch from the top
is the Marvell switch, the second in the bcm6368-enetsw with its 1510 limit.
After this patch the error is gone.
OpenWrt adds a VLAN to each port so we get VLAN tags on all frames. On this
setup we even have 4 more bytes left after the two DSA tags and VLAN so
we can go all the way up to 1532 as MTU.
Testing the new 1532 MTU:
eth0 ext1 enp7s0
.--------. .-----------. cable .------.
| enetsw | <-> | mv88e6152 | <-----> | host |
`--------´ `-----------´ `------´
On the router we set the max MTU for test:
ifconfig eth0 mtu 1520
ifconfig br-wan mtu 1520
ifconfig ext1 mtu 1506
An MTU of 1506 on ext1 is a logic consequence of the above setup:
this is the max bytes actually transferred. The framing added will be:
- 18 bytes standard ethernet header
- 4 bytes VLAN header
- 6 bytes DSA tag for enetsw
- 8 bytes DSA tag for mv88e6152
Sum: 1506 + 18 + 4 + 6 + 8 = 1542 which is out max frame size.
Test pinging from host:
ping -s 1478 -M do 192.168.1.220
PING 192.168.1.220 (192.168.1.220) 1478(1506) bytes of data.
1486 bytes from 192.168.1.220: icmp_seq=1 ttl=64 time=0.696 ms
1486 bytes from 192.168.1.220: icmp_seq=2 ttl=64 time=0.615 ms
Test pinging from router:
PING 192.168.1.2 (192.168.1.2): 1478 data bytes
1486 bytes from 192.168.1.2: seq=0 ttl=64 time=0.931 ms
1486 bytes from 192.168.1.2: seq=1 ttl=64 time=0.810 ms
The max IP packet without headers is 1478, the outgoing ICMP packet is
1506 bytes. Then the DSA, VLAN and ethernet overhead is added.
Let us verify the contents of the resulting ethernet frame of 1542 bytes.
Ping packet on router side as viewed with tcpdump:
00:54:51.900869 AF Unknown (1429722180), length 1538:
0x0000: 3d93 bcae c56b a83d 8874 0300 0004 8100 =....k.=.t......
0x0010: 0000 dada 0000 c020 0fff 0800 4500 05e2 ............E...
0x0020: 0000 4000 4001 b0ec c0a8 0102 c0a8 01dc ..@.@...........
0x0030: 0800 7628 00c3 0001 f5da 1d65 0000 0000 ..v(.......e....
0x0040: ce65 0a00 0000 0000 1011 1213 1415 1617 .e..............
0x0050: 1819 1a1b 1c1d 1e1f 2021 2223 2425 2627 .........!"#$%&'
0x0060: 2829 2a2b 2c2d 2e2f 3031 3233 3435 3637 ()*+,-./0123456
(...)
- 3d93 = First four bytes are the last two bytes of the destination
ethernet address I don't know why the first four are missing,
but it sure explains why the paket is 1538 bytes and not 1542
which is the actual max frame size.
- bcae c56b a83b = source ethernet address
- 8874 0300 0004 = Broadcom enetsw DSA tag
- 8100 0000 = VLAN 802.1Q header
- dada 0000 c020 0fff = EDSA tag for the Marvell (outer) switch,
- 0800 is the ethertype (part of the EDSA tag technically)
- Next follows the contents of the ping packet as it appears if
we dump it on the DSA interface such as tcpdump -i lan1
etc, there we get the stripped out packet, 1506 bytes.
- At the end 4 bytes of FCS.
This clearly illustrates that the DSA tag is included in the MTU
which we set up in Linux, but the VLAN tag and ethernet headers and
checksum is not.
Tested-by: Paul Donald <newtwen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This reverts commit dcdcfc1511.
This is a firmware for third-party u-boot mod, which should not
be carried here by us.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The current dts file of dgs-1210-10p doesn't support link states
for the sfp ports (they are always up).
This patch tries to give better support for this and was run tested
on dgs-1210-10p.
It was heavily inspired from Paul Fertser, RaylynnKnight
and the author of dgs-1210-10mp-f.dts
https://forum.openwrt.org/t/dlink-dgs-1210-10p-with-glc-t-co-sfp/170928
Signed-off-by: Michel Thill <jmthill@gmail.com>
Commit e816591e22 ("ath79: qca: convert to nvmem-layout") mistakenly
switched the source of the mac address from the 'info' to 'art'
partition.
This patch updates all devices that share same 'parent' device tree file
and was tested to fix the problem for eap225-outdoor-v3 - device that I
actually own.
Fixes: e816591e22 ("ath79: qca: convert to nvmem-layout")
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
[amend commit message]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Enabling SMP on Danube[1] is incompatible with a patch that
adds support for interrupt handling on all cores on other
platforms[2]. This patch fixes the mentioned issue.
1. 084c20f6c5 ("lantiq: xway: kernel: enable SMP support ")
2. fbd33d6164 ("lantiq: enable interrupts on second VPEs")
Fixes: #13934Fixes: #14283
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
By default Linux will default to most IRQ-s being mapped to core 0 which
during high loads will completely swamp the core 0, so lets add the widely
used script that has been floating around forums for a long time to try and
optimize the IRQ mapping a bit.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some of devices in this target have only 8 MiB space and are closing to
borders of usable space. Particularly, TP-Link RE305 v1 already suffers
from this issue[1], where with current partition layout, on release
images, there's not enough space for overlay. So activate small_flash
feature, which will remove some userspace hardening but will gain almost
1 MiB additional flash memory space. Here is small size comparison of
similar device (RE365 v1) with default config + LuCI:
kernel rootfs sysupgrade
current: 2305728 3635044 5964584
small_flash: 1713571 3320132 5047080
1. https://github.com/openwrt/openwrt/issues/14215
Suggested-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Renumber backport patches starting from 000 to tidy things up.
Also fix patch name format for the mmc backport patch.
Refresh patches affected by this renumber change.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Move stmmac backport fix patches from ipq806x to generic backport
directory as they got merged upstream and they fix wide performance
regression.
This will eventually cause performance increase on any user of the
stmmac driver.
Generic patch automatically refreshed with make target/linux/refresh.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add support for Ubiquiti LiteBeam M5 (XW).
The device was previously supported in ar71xx.
See commit: https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=d0988235dd277b9a832bbc4b2a100ac6e821f577
Add ALTX_MODEL for Ubiquiti AirGrid M5 HP (XW), Ubiquiti PowerBeam M5 300 (XW) in generic-ubnt.mk
This models are identical (firmware-wise) to the already supported Ubiquiti Nanostation Loco M (XW)
Add also Ubiquiti NanoBeam M5 to ALTX_MODEL of Ubiquiti Nanostation Loco M (XW) since it's another clone.
Tested on:
- Ubiquiti LiteBeam M5 (XW)
- Ubiquiti PowerBeam M5 (XW)
This also modify target/ath79/dts/ar9342_ubnt_xw.dtsi to use nvmem for calibration data
Checked that the caldata size in the eeprom partition are actually 0x440 on:
- Ubiquiti PowerBeam M5 (XW)
- Ubiquiti Nanostation M5 (XW)
- Ubiquiti LiteBeam M5 (XW)
- Ubiquiti AirGrid M5 HP (XW)
Signed-off-by: Samuele Longhi <agave@dracaena.it>
Booting from non-MMC devices on Rockchip targets without this
change results in a boot failure:
Model: FriendlyElec NanoPi R5S
Net: eth0: ethernet@fe2a0000
Hit any key to stop autoboot: 0
** Booting bootflow 'nvme#0.blk#1.bootdev.part_1' with script
** No partition table - mmc 0 **
** No partition table - mmc 0 **
Couldn't find partition mmc 0:1
Can't set block device
Wrong Image Type for bootm command
ERROR -91: Protocol wrong type for socket: can't get kernel image!
Boot failed (err=1)
This change fixes the default boot script for Rockchip targets to
support booting from non-MMC devices such as NVMe or USB drives.
Some targets with only a boot rom (e.g. NanoPi R5S) may require u-boot
to be installed on the eMMC or a MicroSD card in order to boot from
non-MMC devices.
Fixes: #14420
Reviewed-by: Tianling Shen <cnsztl@immortalwrt.org>
Signed-off-by: Justin Klaassen <justin@tidylabs.app>
The WLAN + WED reset sequence relies on being able to receive interrupts from
the card, in order to synchronize individual steps with the firmware.
When WED is stopped, leave interrupts running and rely on the driver turning
off unwanted ones.
WED DMA also needs to be disabled before resetting.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Refresh patches for Linux 6.1 which no longer apply cleanly after
adding patches to fix ethernet rx hang issue on MT7981/MT7986.
Fixes: ede34465de ("mediatek: fix ethernet rx hang issue on MT7981/MT7986")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
