Device tree binding for dwc2 usb driver on danube.
Leave old ifxhcd-danube driver as an alternative.
Also adds dr_mode = "host" to eliminate warning on boot.
Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com>
All compiled device tree files not mentioned are binary identical to the
former ones.
Fix the obvious decimal/hex confusion for the power key of ramips/M2M.dts.
Due to the include of the input binding header, the BTN_* node names in:
- ramips/GL-MT300A.dts
- ramips/GL-MT300N.dts
- ramips/GL-MT750.dts
- ramips/Timecloud.dts
will be changed by the compiler to the numerical equivalent.
Move the binding include of lantiq boards to the file where they are
used the first time to hint the user where the values do come from.
Signed-off-by: Mathias Kresin <dev@kresin.me>
- remove not existing properties
- remove properties having the same values as the included dtsi
- remove nodes which are disabled in the included dtsi and not enabled
in dts
- replace the deprecated pinctrl-* compatible strings
- use the same labels for nodes as the included dtsi
- move common used vr9 pci properties to vr9.dtsi
- remove the unused stp node from HomeHub 2B devcie tree source file
- fix spaces vs. tabs and remove superfluous linebreaks
Signed-off-by: Mathias Kresin <dev@kresin.me>
This bugfix enables FXS support on dabube based devices.
Changed "compatible" attribute from "vmmc" to "vmmc-xway".
The vmmc driver uses "vmmc-xway".
Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
The device tree file of ARV752DPW uses numbers/hex values for gpio states and input event codes.
This cleans it up and uses the available macros from header files. This way the functions are easier to read and comprehend.
Signed-off-by: Andreas Eberlein <foodeas@aeberlein.de>
[sanitize all device tree files]
Signed-off-by: Mathias Kresin <dev@kresin.me>
These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48284
