Commit Graph

89 Commits

Author SHA1 Message Date
Chuanhong Guo
32817580e7 ath79: ag71xx: defer probe if of_phy_connect failed
gmac0 may need a phy on builtin switch, which can be unavailable
if gmac0 is probed before builtin switch.
Return -EPROBE_DEFER in this case so that gmac0 can be probed
later.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-06-05 10:12:31 +02:00
Petr Štetiar
206af613b2 ath79: ag71xx: update ethtool support
ethtool doesn't work currently as phy_ethtool_ioctl expects user space
pointer, but it's being passed kernel one. Fixing it doesn't make sense
as {s,g}et_settings were deprecated anyway.  So let's rather remove
phy_ethtool_ioctl and use new {s,g}et_link_ksettings instead. While at
it, update nway_reset as well.

Cc: John Crispin <john@phrozen.org>
Ref: https://bugs.openwrt.org/index.php?do=details&task_id=1982
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-06-05 10:12:30 +02:00
Petr Štetiar
5fee0a0923 ath79: ag71xx: remove unused SIOCETHTOOL ioctl handling
This ioctl is currently routed through generic interface code:

 dev_ioctl
   dev_ethtool
     __ethtool_get_link_ksettings
       phy_ethtool_ioctl

Cc: John Crispin <john@phrozen.org>
Cc: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-06-05 10:12:30 +02:00
Petr Štetiar
189aa1748b ath79: ag71xx: Enable tx hang workaround for the rest of ar724x SoCs
In ar71xx we check for stuck DMA on devices which fall in the is_ar724x
SoC group (ar724x, ar933x, ar934x, qca9533, tp9343, qca955x, qca956x).

In ath79 we're currently performing this check only for devices with
ar7240 SoC, so this patch tries to sync the dma stuck checking behavior
with what is being done in ar71xx.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-04-08 18:37:04 +02:00
Chuanhong Guo
3d93b35f03 ath79: ag71xx: remove switch driver in ag71xx
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-24 01:44:27 +01:00
Chuanhong Guo
4eaa3626a8 ath79: ag71xx: pass correct device pointer to dma functions
linux 4.19 doesn't accept a NULL device for these functions.
It also complains that the device struct in net_device doesn't have
a dma_mask set.
Pass the device struct from platform_device for these functions.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-24 01:44:24 +01:00
Chuanhong Guo
8d3af284e0 ath79: ag71xx: add support for timer functions in linux 4.15+
Kernel newer than 4.15 dropped "data" field and used from_timer
to cast out the parent struct pointer for current timer.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-24 01:44:24 +01:00
Rosen Penev
96e0fa94c7 ath79: ag71xx: Remove ndo_poll_controller
It is unused by default and upstream is trying to remove it as it has
negative effects when the driver is under load. Upstream explanation:

netpoll: avoid capture effects for NAPI drivers
As diagnosed by Song Liu, ndo_poll_controller() can
be very dangerous on loaded hosts, since the cpu
calling ndo_poll_controller() might steal all NAPI
contexts (for all RX/TX queues of the NIC).

This capture, showing one ksoftirqd eating all cycles
can last for unlimited amount of time, since one
cpu is generally not able to drain all the queues under load.

It seems that all networking drivers that do use NAPI
for their TX completions, should not provide a ndo_poll_controller() :

Most NAPI drivers have netpoll support already handled
in core networking stack, since netpoll_poll_dev(
 uses poll_napi(dev) to iterate through registered
NAPI contexts for a device.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
2019-03-13 16:35:45 +01:00
Petr Štetiar
368b6d1a52 ath79: gmac: ar934x: Add parser for mii-gmac0-slave
While converting Nanostation M XW from current ar71xx code to ath79 I've
hit one issue, where the ethernet networking wasn't working, so I was
checking every bit in the networking setup path between ar71xx and
ath79.

I've came to the following code in ar71xx/mach-ubnt-xm.c:

 static void __init ubnt_xw_init(void) {
 	...
 	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 |
                                   AR934X_ETH_CFG_MII_GMAC0_SLAVE);
 	...
 }

Where this code is setting AR934X_ETH_CFG_MII_GMAC0_SLAVE bit in
AR934X_GMAC_REG_ETH_CFG register, but I couldn't find a way of setting
this bit from DTS, so this patch adds `mii-gmac0-slave` DTS property
which allows setting of this bit in `gmac-config`, which is then used in
Nanostation M XW DTS.

Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-03-05 03:15:52 +01:00
Chuanhong Guo
cea3e9e438 ath79: ag71xx: add support for optional mdio reset
On ar933x and later chips, there are separated mac/mdio resets, but
resetting the entire gmac block with register values requires both
mac_reset and mdio_reset to be asserted together.

Add support for optional mdio reset so that we can do a full reset
if needed.

This patch also replaced deprecated devm_reset_control_get for
mac reset.

To use this feature, the following is needed:
 1. drop "simple-mfd" compatible to register mdio0 after gmac init
    so that mdio registers aren't reset after initialization.
 2. move mdio reset from mdio-bus to its parent eth node.

NOTE: This can't be applied on gmac1 with builtin switch since we
haven't add a feature to defer probe if phy connection failed.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-05 03:02:34 +01:00
Chuanhong Guo
596a5325cd ath79: ag71xx: register mdio using of_platform_populate
remove the hacky checking of "simple-mfd" compatible
also add some comments explaining that piece of code.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-05 03:02:34 +01:00
Chuanhong Guo
f92bbdcc93 ath79: ag71xx-mdio: get reset control using devm api
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-05 03:02:34 +01:00
Chuanhong Guo
a4eef43a12 ath79: ag71xx: replace alloc_etherdev with devm_alloc_etherdev
using the devm api makes the code simpler.
also drop unneeded memory free from ag71xx_remove since they are
allocated using devm apis.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-05 03:02:34 +01:00
Chuanhong Guo
f73b2d64ed ath79: ag71xx: replace ag71xx_get_phy_if_mode_name() with phy_modes()
phy_modes() in phy.h can convert PHY modes to string with supports
for all available PHY modes.

Also add a space in mode printing to make it look better.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-05 03:02:34 +01:00
Petr Štetiar
5fd68d60e4 ath79: ag71xx: Fix tx queue timeouts during ifup
On ath79 and UBNT Bullet M XW (ar9342) I was experiencing weird issues during
network setup[1] which I was able to reproduce easily with following commands:

 uci set network.lan.ipaddr='192.168.1.20'
 uci commit network
 ifup lan

Which resulted after some time in:

 ...
 WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x16c/0x280
 NETDEV WATCHDOG: eth0 (ag71xx): transmit queue 0 timed out
 ...

Sometimes I wasn't able to use networking anymore, sometimes it was enough to
just ifdown/ifup lan and network was backup. On ar71xx it was all working just
fine.

I've found out, that it was happening because ag71xx_poll() wasn't called, thus
the TX queue wasn't emptied. The ag71xx_poll() is being called from napi
hrtimer, which is enabled by napi_schedule() in ar71xx_interrupt(), but since
no interrupts were ever fired again after ag71xx_stop() was called, it was
always leading to tx queue timeouts:

 *** ag71xx_hard_start_xmit()
 eth0: packet injected into TX queue
 eth0: raw intr=00000001 TXPS POLL
 eth0: enable polling mode
 eth0: processing TX ring, flush=no
 eth0: disable polling mode, rx=1, tx=1,limit=32

 ( `ifup lan done here` )

 *** ag71xx_stop()
 *** ag71xx_open()
 *** ag71xx_hw_enable()
 IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
 IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
 *** ag71xx_hard_start_xmit()
 eth0: packet injected into TX queue
 *** ag71xx_hard_start_xmit()
 eth0: packet injected into TX queue
 ...
 WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:320 dev_watchdog+0x164/0x274

So I've looked at ag71xx_stop() in ar71xx, added the missing bits to ath79 and
fixed this issue.

1. https://github.com/openwrt/openwrt/pull/1635#issuecomment-448638246

Signed-off-by: Petr Štetiar <ynezz@true.cz>
[move ag->link before ag71xx_hw_disable to retain ordering as original]
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
2019-02-07 14:19:46 +01:00
Milan Krstic
76a629ee35 ath79: ag71xx: preserve port mirror flags during swconfig apply
The swconfig load operation always triggers 'apply' function which in
this driver currently clears port mirroring flags effectively undoing
port mirroring configuration.

Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
2019-01-22 09:05:59 +01:00
Petr Štetiar
7bd2595b67 ath79: ag71xx: Fix code formatting in ag71xx_probe
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2018-12-17 08:04:19 +01:00
Petr Štetiar
a29df78c9f ath79: ag71xx: Unify debug output with ar71xx and make debugging easier
Currently it's quite hard to diff debugging output between ar71xx and
ath79, so this patch tries to improve it by adding the same
ag71xx_dump_regs function and placing debugging output from the
registers to relatively same places.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
2018-12-17 08:04:05 +01:00
Christian Lamparter
cd9c2492c1 ath79: port cybertan_part from ar71xx
This patch ports the cybertan_part code from ar71xx and converts the
driver to a DT-supported mtd parser. As a result, it will no longer
add the u-boot, nvram and art partitions, which were never part of
the special Cybertan header.

Instead these partitions have to be specified in the DT, which has the
upside of making it possible to add properties (i.e.: read-only), labels
and references to these important partitions.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2018-09-10 09:07:11 +02:00
Matt Merhar
9c26def64a ath79: fix unaligned access panic in ag71xx_mdio_probe
Without "syscon" being present in an ag71xx ethernet DT node's
compatible property, a panic occurs at boot during probe citing
"Unhandled kernel unaligned access".

With this modification, the panic no longer occurs and instead the probe
simply fails, allowing the boot process to continue.

Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
2018-09-06 21:35:53 +02:00
Chuanhong Guo
028daa9974 ath79: ag71xx: apply interface mode to MII0/1_CTRL on ar71xx/ar913x
We currently don't have any code configuring interface mode in ath79,
meaning that we relies on bootloader to set the correct interface mode.

This patch added code to set interface correctly so that everything works
even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set
the second GMAC mode to RMII but it should be RGMII.)

Introduced "qca,mac-idx" for the difference in MII_CTRL register value.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-08-28 11:26:53 +02:00
Christian Lamparter
f3ffac90bc ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344
Some AR9344 boards do very poorly with the default settings and
need custom rxdv-delay, rxd-delay, txd-delay, txen-delay flags
to perform reasonably.

In this case the WD My Net Wi-Fi Range Extender can not even
manage 10Mbps on a 1Gbit link:

root@AR9344:~# iperf3 -s
-----------------------------------------------------------
Server listening on 5201
-----------------------------------------------------------
Accepted connection from client [...]
[  5] local [...] connected to client
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-1.00   sec  1.09 MBytes  9.16 Mbits/sec
[  5]   1.00-2.00   sec   895 KBytes  7.33 Mbits/sec
[  5]   2.00-3.00   sec   762 KBytes  6.25 Mbits/sec
[...]
[  5]  10.00-10.03  sec  17.0 KBytes  4.74 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-10.03  sec  9.00 MBytes  7.52 Mbits/sec

with but with the correct settings in place, it does much better:

root@AR9344:~# iperf3 -s
-----------------------------------------------------------
Server listening on 5201
-----------------------------------------------------------
Accepted connection from client [...]
[  5] local [...] connected to client
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-1.00   sec  23.1 MBytes   193 Mbits/sec
[  5]   1.00-2.00   sec  23.1 MBytes   194 Mbits/sec
[  5]   2.00-3.00   sec  23.2 MBytes   195 Mbits/sec
[...]
[  5]  10.00-10.04  sec   710 KBytes   180 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bitrate
[  5]   0.00-10.04  sec   237 MBytes   198 Mbits/sec

The tx data and enable delay bits definitions are taken from Atheros'
AR9344 Data Sheet Section "8.6.1 Ethernet Configuration (ETH_CFG)" on
page 153.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2018-08-13 08:48:37 +02:00
David Bauer
7d1b742b4d ath79: add QCA956x GMAC config
This commit adds the ability to configure the GMAC of the QCA956x.

Signed-off-by: David Bauer <mail@david-bauer.net>
2018-08-13 08:43:15 +02:00
Chuanhong Guo
42b3fdf981 ath79: ag71xx: fix speed applied to MII0/1_CTRL on ar71xx/ar913x
Currently speed value is applied to interface mode field.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-08-13 08:37:19 +02:00
Chuanhong Guo
387736af41 ath79: ag71xx: remove PHY reset
Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.

Remove PHY reset support from ag71xx and definition for them in dtsi.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-08-09 18:44:57 +02:00
Chuanhong Guo
f593020a28 ath79: ag71xx: assert a switch reset if defined in dts.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:35 +02:00
Chuanhong Guo
f43e8f9004 ath79: ag71xx: Explicitly register mdio bus after ag71xx_hw_init() for ar7240
mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?)
Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0
For ar7240 and older chips, manually create platform device after
ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between
ag71xx_hw_init() and ag71xx_phy_connect().

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:35 +02:00
Chuanhong Guo
85189e4c00 ath79: ag71xx: Rework mdio clock settings
Allow specifying desired mdio clock frequency in dts.
Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:34 +02:00
Chuanhong Guo
7ae9e63719 ath79: ag71xx: Make builtin switch driver a separated module
This patch did several things:
1. Probe the builtin switch as a separated mdio device.
2. Register a separated mdio bus for builtin switch.
3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:33 +02:00
Chuanhong Guo
83d2dbc599 ath79: ag71xx: Split mdio driver into an independent platform device.
We need to have mdio1 belonging to gmac1 initialized before gmac0.
Split it into a separated mdio device to get both mdios ready before probing gmac.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:33 +02:00
Chuanhong Guo
24cbe27bb7 ath79: ag71xx: Remove ar7240_set_addr and ag71xx_ar7240_start
The builtin switch has it's initial valid mac address(00:00:01:00:00:00).
Since the builtin switch is an independent device, setting mac address of gmac1 to builtin switch isn't a good idea and this makes it impossilbe to split builtin switch apart as an independent platform device.
Remove these functions and apply default VLAN during initialization as a preparation for further driver splitting.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:33 +02:00
Chuanhong Guo
2d081addb5 ath79: ag71xx: Split gmac config into separated file and add support for ar934x/qca955x.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:33 +02:00
Mathias Kresin
31aa62c5ec ath79: drop mv88e6063 switch driver
Due do a missing KCONFIG isn't selectable nor enabled in the target
kernel config. Drop it for now and enable/add the driver at the time it
is required.

Signed-off-by: Mathias Kresin <dev@kresin.me>
2018-07-04 01:20:02 +02:00
Lucian Cristian
c8e76cd4ff ath79: fix rx ring buffer stall qca956x
when ported from ar71xx to ath79 the qca9560-eth was omitted

Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
2018-06-18 18:21:20 +02:00
Weijie Gao
52109ce71f ath79: ag71xx: fix pll-data setting for ar7242/ar934x/qca955x/qca956x
ar71xx/ar913x series use the old pll registers and settings.

However started from ar7242, a new pll register is introduced and the
pll setting is much simpler.

This can be observed from dev-eth.c from the ar71xx target.

Signed-off-by: Weijie Gao <hackpascal@gmail.com>
2018-06-18 18:21:19 +02:00
John Crispin
5a6a32ad9b ath79: fix adjust_link callback for ar9130
Signed-off-by: John Crispin <john@phrozen.org>
2018-05-24 15:43:39 +02:00
Johann Neuhauser
a7e1e919af ath79: preliminary support for TP-Link WDR3600 / WDR4300 (AR9344)
working:
 - leds
 - buttons
 - lan / wan
 - usb (hub port 1 + 2)
 - wifi 5g
 - sysupgrade
 - ...

not working:
 - wifi 2g

Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
2018-05-22 20:53:15 +02:00
Johann Neuhauser
c15dfbeea0 ath79: fix gmac compatible in ar9330.dtsi and ag71xx_setup_gmac_933x
1. compatible property in node gmac was wrong

2. ag71xx_setup_gmac_933x should use np of gmac-config and
   not the pointer to gmac. gmac is only used for the reg address.

Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
2018-05-15 06:38:07 +02:00
John Crispin
53c474abbd ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.

Signed-off-by: John Crispin <john@phrozen.org>
2018-05-07 08:06:51 +02:00