Now, that initramfs images built for ZTE devices work, by moving
LZMA_TEXT_START further up the available RAM - same fix works
successfully for Meraki MR18 too. Apply it and reenable initramfs
generation again.
Fixes: 1d49310fdb5e ("ath79: add Cisco Meraki MR18")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17680
Signed-off-by: Robert Marko <robimarko@gmail.com>
Ruckus R500 datasheet: https://webresources.ruckuswireless.com/datasheets/r500/ds-ruckus-r500.html
Specifications:
SoC: 720Mhz QCA9558
RAM: 256MB
Storage: 64MB of FLASH (SPI NOR - S25FL512S)
1x AR8327 GB switch
Ethernet: 1x1000M port #3 on AR8327,
1x1000M (802.3at POE), port #5 on AR8327
Wireless: QCA988X HW2.0 802.11ac
AR9550 2.4GHz 802.11b/g/n
5x GPIO LED
1x GPIO Reset Button
1x DC Jack 12v
1x UART, 3.3v, 115200
1x TPM, SLB9645TT12
2x Beamforming antennas configured via 74LV164
MAC addresses:
1. art 0x807E | Factory bridged | f0:3e:90:XX:XX:80 |
2. art 0x66 | eth0 | f0:3e:90:XX:XX:83 | (port 5, cpu port 6) - PoE port
3. art 0x6c | eth1 | f0:3e:90:XX:XX:84 | (port 3, cpu port 0) - non PoE port
Serial console: 115200-8-N-1 on internal H4 header.
Pinout:
H1
-----------
|1|x|3|4|5|
-----------
Pin 1 is near the "H4" marking.
1 - RX
x - no pin
3 - VCC (3.3V)
4 - GND
5 - TX
JTAG: Connector H2, similar to MIPS eJTAG, standard, unpoulated.
H9
----------------------
|2 |4 |6 |8 |10|12|14|
----------------------
|1 |3 |5 |7 |9 |11|13|
----------------------
3 - TDI
5 - TDO
7 - TMS
9 - TCK
2,4,6,8,10 - GND
14 - Vref
1,11,12,13 - Not connected
I²C: connector H2, near power LED, unpopulated:
------
|1|2|3
------
H2
1 - SCL
2 - SDA
3 - GND
Installation:
Serial Port/TFTP
1. Setup tftp server on the local network
2. Connect to UART with TTL
3. Interupt U-boot process with Ctrl-C
4. Setup appropriate ipaddr and serverip in setenv:
- setenv ipaddr 192.168.1.1
- setenv serverip 192.168.1.2
5. On TFTP Server - copy openwrt-ath79-generic-ruckus_r500-initramfs-kernel.bin to /srv/tftp
6. On R500 boot into initrd image
- tftpboot 0x81000000 openwrt-ath79-generic-ruckus_r500-initramfs-kernel.bin
- bootm 0x81000000
7. On TFTP server - scp -O openwrt-ath79-generic-ruckus_r500-squashfs-sysupgrade.bin root@192.168.1.1:/tmp
8. Ensure the boot command is set before flashing the image:
fw_setenv bootcmd 'bootm 0xbf1c0000'
9. On R500 - sysupgrade /tmp/openwrt-ath79-generic-ruckus_r500-squashfs-sysupgrade.bin
10. If not done in 8; set boot command from U-boot shell itself:
- setenv bootcmd bootm 0xbf1c0000
- saveenv
- reset
This patch adapted from https://github.com/victhor393/openwrt-ruckus-r500/tree/ruckus-r500-master
Signed-off-by: Damien Mascord <tusker@tusker.org>
- Heavily refactored the device tree
- Extended commit message
- Documented onboad connectors
- Refactored MAC and calibration data setups to use nvmem-layout
- Made both network interfaces LAN ports and bridge them, this makes
more sense for an access point and is consistent with the rest of
Ruckus APs.
- Enable lzma-loader for compressed initramfs
- Enabled the optional internal USB port
- Added missing LEDs and according pinctrl settings
- Added reserved memory region used for bootloader communication
- Added the bit-banged I²C bus and onboard TPM
- Refactored boot scheme and flash layout to match earlier Ruckus
devices and maximize usable space for user data.
Quirks:
- H7 is the physical presence switch for the SLB9645TT12 TPM.
TODO:
- Link state reporting on the Ethernet ports doesn't work and both ports
report "up" due to limitation of swconfig ar8327 driver. With DSA
conversion, this shall be rectified.
- Locate 2nd shift register (U7) controlling beamforming antennas, probably
on ath10k GPIOs which are currently unsupported in the driver. For
this, there is a device tree node describing that - but explicitly
disabled.
- At the moment of adding support, there is an endianness bug in the TPM
driver causing it to not detect the TPM module because of ID mismatch.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17550
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that LZMA_TEXT_START is configurable per-target once again,
move the target above 32MB boundary for ZTE MF28* devices.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17616
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
initramfs for some devices grew so big, that it can't be loaded within
the previous 32MB RAM limit. Make the LZMA_TEXT_ADDRESS configurable
per-target once again, to fix it for bigger devices, while maintaining
compatibility with previous ones.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17616
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
According to datasheet, on AR9344 the switch and switch analog need to
be reset first before initiating a full reset.
Resetting these systems fixes spurious reset hangs on Atheros AR9344
SoCs.
Link: https://github.com/freifunk-gluon/gluon/issues/2904
Signed-off-by: David Bauer <mail@david-bauer.net>
This reverts commit 916af73fc388d638b1a717a2411792e0680dd8e6.
It was reported this change did not fix the reboot issues on AR9344.
Signed-off-by: David Bauer <mail@david-bauer.net>
Define RUT240 as alternative name, to explicitly show the device is
supported using existing image.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17503
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Newer modems used in RUT240 (Quectel EC25 and MeiG SLM750) use the
"option" driver instead of CDC-ACM. Include it in the image too.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17503
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Remove GPIO hog for modem power, as well as define userspace GPIO
switches for enabling and resetting the modem. While at that, define a
switch for the external GPIO available on the power connector.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17503
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
USB VBUS regulator was attached to GPIO19, which isn't in fact
controlling the modem power itself, but rather modem power key - which
has to be asserted high for at least 500ms, to start the modem. Keeping
it high allows the modem to reboot upon shutdown - so it is desirable to
control this line from userspace, for example - to allow clean modem
shutdown down upon powering off the router part.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17503
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Teltonika RUT240 has an extra 4G status LED on GPIO21. Otherwise the
hardware is fully compatible with RUT230 line. Attach the LED inside
device tree.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17503
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Due to "SIM present" input defaulting to "button" type, it is
interpreted as such when booting, and causes the system to enter
failsafe, if the tray is missing. Similarly to rfkill switch on
TP-Link WDR4300 and Archer C7, make it EV_SW instead, to stop it from
interfering with the boot process.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17503
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It's missing a hyphen present in every other LED from the set. Set it to
"green:signal-strength-4".
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17503
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The only real user of this patch was removed and migrated to the
upstream friendly regulator. Remove this hack.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17356
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently, an OpenWrt hack is used to turn the GPIO on in terms of the
PHY driver when it should be the USB driver that controls it. The
chipidea USB2 driver has support for a vbus-supply property. Use it
instead of the local OpenWrt solution that just turns on the GPIO.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17356
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The chipidea USB2 driver used on this platform supports controlling GPIO
through regulators. This is the upstream friendly solution.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17356
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
ath79 uses the generic-ehci driver, which does not support regulators
using vbus-supply.
dr_mode is also not useful as the driver does not support multiple
modes.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17486
Signed-off-by: Robert Marko <robimarko@gmail.com>
According to datasheet, on AR9344 the switch and switch analog need to
be reset first before initiating a full reset.
Resetting these systems fixes spurious reset hangs on Atheros AR9344
SoCs.
Link: https://github.com/freifunk-gluon/gluon/issues/2904
Signed-off-by: David Bauer <mail@david-bauer.net>
This LED controller has a driver under development which is currently being reviewed by the respective kernel maintainers. They are currently on v11 which is included here.
The LED1202 is a 12-channel low quiescent current LED driver with:
* Supply range from 2.6 V to 5 V
* 20 mA current capability per channel
* 1.8 V compatible I2C control interface
* 8-bit analog dimming individual control
* 12-bit local PWM resolution
* 8 programmable patterns
If the led node is present in the controller then the channel is
set to active.
The output current can be adjusted separately for each channel by 8-bit
analog (current sink input) and 12-bit digital (PWM) dimming control. The
LED1202 implements 12 low-side current generators with independent dimming
control.
Internal volatile memory allows the user to store up to 8 different patterns,
each pattern is a particular output configuration in terms of PWM
duty-cycle (on 4096 steps). Analog dimming (on 256 steps) is per channel but
common to all patterns. Each device tree LED node will have a corresponding
entry in /sys/class/leds with the label name. The brightness property
corresponds to the per channel analog dimming, while the patterns[1-8] to the
PWM dimming control.
Signed-off-by: Manuel Fombuena <fombuena@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17451
Signed-off-by: Robert Marko <robimarko@gmail.com>
We can use a package for the MV88E6060 DSA switch on the single
ath79 device that uses it, saving around 600 KB of memory on
all other devices (for the DSA infrastructure, mainly).
As far as I can see the TP-Link TL WR941 v2 is the only device
using MV88E6060 and the only device with a DSA switch overall.
However the ath79 people should look at this so I'm not
mistaken.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250102-ath79-mv88e6060-module-v1-1-c2a8e31e72fc@linaro.org/
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The fritz 300e has an AR9382, which is atypical for ar7242 platforms.
Document it properly.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17427
Signed-off-by: Nick Hainke <vincent@systemli.org>
The former is deprecated in favor of nvmem-layout. In preparation for
eventual removal from the kernel, do so here.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16097
Signed-off-by: Robert Marko <robimarko@gmail.com>
The former is deprecated in favor of nvmem-layout. In preparation for
eventual removal from the kernel, do so here.
Some of these are leftovers from nvmem-layout conversion.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16097
Signed-off-by: Robert Marko <robimarko@gmail.com>
Short specification:
* 650/600/216 MHz (CPU/DDR/AHB)
* 2x 10/100 Mbps Ethernet, passive PoE support
* 64 MB of RAM (DDR2)
* 16 MB of FLASH
* 2T2R 2.4 GHz with external PA, up to 30 dBm (1000mW)
* 2x internal 14 dBi antennas
* 8x LED, 1x button
* No UART on PCB on some versions
* Display panel with 2x buttons (F/N) not supported (and not relevant in OpenWrt)-
Flash instructions
* Connect PC with 192.168.0.141 to WAN port
* Install a TFTP server on your PC ('atftp' is doing the job for instance)
* Copy your firmware in the TFTP folder as upgrade.bin
* Power up device pushing the 'reset' button
* The device shall upload upgrade.bin, install it and reboot
* Device shall be booting on 192.168.1.1 as default
Signed-off-by: Joan Moreau <jom@grosjo.net>
Link: https://github.com/openwrt/openwrt/pull/17279
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Makes it clear that the calibration size is correct as most ar72xx
devices use older wifi chips.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17278
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These devices use AR9287, which uses 3d8 as the calibration size, not
440 like newer chips do. Add a compatible line to make it clear that
this is the case.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17278
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These three devices use AR9287 chips, which have a calibration size of 3d8.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17278
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Referencing commit a1837135e04b
Hardware
--------
SoC: Qualcomm Atheros QCA9558
RAM: 128M DDR2 (Nanya NT5TU64M16HG-AC)
FLASH: 128M SPI-NAND (Spansion S34ML01G100TFI00)
WLAN: QCA9558 3T3R 802.11 bgn
ETH: Qualcomm Atheros QCA8337
UART: 115200 8n1
BUTTON: Reset - WPS - "Router" switch
LED: 2x system-LED, 2x wlan-LED, 1x internet-LED,
2x routing-LED
LEDs besides the ethernet ports are controlled
by the ethernet switch
MAC Address:
use address(sample 1) source
label cc:e1:d5:xx:xx:ed art@macaddr_wan
lan cc:e1:d5:xx:xx:ec art@macaddr_lan
wan cc:e1:d5:xx:xx:ed $label
WiFi4_2G cc:e1:d5:xx:xx:ec art@cal_ath9k
Installation from Serial Console
------------
1. Connect to the serial console. Power up the device and interrupt
autoboot when prompted
2. Connect a TFTP server reachable at 192.168.11.10/24
to the ethernet port. Serve the OpenWrt initramfs image as
"openwrt.bin"
3. Boot the initramfs image using U-Boot
ath> tftpboot 0x84000000 openwrt.bin
ath> bootm 0x84000000
4. Copy the OpenWrt sysupgrade image to the device using scp and
install it like a normal upgrade (with no need to keeping config
since no config from "previous OpenWRT installation" could be kept
at all)
# sysupgrade -n /path/to/openwrt/sysupgrade.bin
Installation from Web Interface
------------
To flash just do a firmware upgrade from the stock firmware (Buffalo
branded dd-wrt) with squashfs-factory.bin
Signed-off-by: Edward Chow <equu@openmail.cc>
Link: https://github.com/openwrt/openwrt/pull/17227
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17311
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated. MAC address stuff needs to remain
handled in userspace as it's encrypted. Maybe an NVMEM driver can be
written in the future...
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17276
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is using mac-base and so a 0 needs to be added.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17274
Signed-off-by: Robert Marko <robimarko@gmail.com>
The original ar71xx version of this device used 1002 as mac address for
both ethernet and wireless. The ath79 version inexplicably changes this
to 2, which seems to be done nowhere else in ath79, indicating it's
bogus.
Restore previous ar71xx assignment. 1002 is used as an ethernet
interface with some other devices as well.
Also remove the bogus caldata userspace extraction. The size is bogus
and it's already handled in dts.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17083
Signed-off-by: John Crispin <john@phrozen.org>
Upstream uses devm_reset_control_array_get_optional_shared, which does
not use names. reset-names is also not specified in the documentation.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17118
Signed-off-by: John Crispin <john@phrozen.org>
Both generic-ehci.yaml and generic-ohci.yaml state that phy-names is to
only be usb.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17118
Signed-off-by: John Crispin <john@phrozen.org>
This matches the upstream PHY driver, which removed it.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17118
Signed-off-by: John Crispin <john@phrozen.org>
This is a simple conversion to dts.
68ac3f2cddab states that the 5ghz wifi address is calculated from ART 0
+ 2.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17066
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
1002 and 5006 are default addresses as part of the calibration data.
Don't bother specifying them explicitly.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17082
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The KuWFi N650 is a 5GHz outdoor wireless bridge based on QCA9563.
Specs
=====
CPU: QCA9563, 775MHz
RAM: 128MiB
Flash: 16MiB
Wireless: QCA9888 (5GHz only)
Ethernet: 2x GBit (via QCA8337), 48V passive PoE
Installation
============
From OEM firmware
-----------------
The OEM firmware has telnet enabled by default. If not, it can be enabled
from the firmware web interface. You need a TFTP server on your computer
and the OpenWrt factory image should be available as "n650factory.bin".
It is assumed that your computer has the IP 192.168.1.1 and the N650
192.168.1.20 (default IP address).
1. Connect via Telnet to the device and log in with the default credentials
"admin:admin"
2. Exploit the limited interface by typing "ps & /bin/sh"
3. Press <ENTER> to start the shell
4. Enter the following commands:
$ cd /tmp
$ tftp -r n650factory.bin -g 192.168.1.1
$ cat << EOF > /tmp/openwrt.sh
#!/bin/sh
IMAGE_NAME="\$1"
if [ ! -e \${IMAGE_NAME} ]; then
echo "Image file not found: \${IMAGE_NAME}"
exit 1
fi
. /usr/sbin/common.sh
kill_remaining TERM
sleep 3
kill_remaining KILL
run_ramfs mtd write \${IMAGE_NAME} firmware
sleep 2
reboot -f
EOF
$ chmod +x /tmp/openwrt.sh
$ /tmp/openwrt.sh n650factory.bin
Once the device reboots, it should load OpenWrt.
From UART
---------
UART installation is possible since the serial header is already soldered
on. The pinout is GND - Tx - Rx - VCC from top to bottom (RJ45 ports are
at the bottom). Connect with 115200 8N1.
First, boot OpenWrt from TFTP. Enter the following commands in the U-Boot
shell, assuming your computer has the IP address 192.168.1.1 and a TFTP
server running where the initramfs image is provided as n650.bin:
setenv ipaddr 192.168.1.20
setenv serverip 192.168.1.1
tftpboot 0x84000000 n650.bin
bootm
Once booted, transfer -loader.bin and -sysupgrade.bin images to the device
at /tmp. Enter the following commands, replacing the filenames:
mtd write /tmp/loader.bin loader
sysupgrade /tmp/sysupgrade.bin
Reboot and OpenWrt should load from flash.
Back to Stock
-------------
Back to stock is only possible if you saved a partition backup before
installing OpenWrt. Assuming you have fullbackup.bin covering the whole
flash, you need to prepare the image as follows:
$ dd if=fullbackup.bin of=fwconcat0.bin bs=65536 skip=4 count=212
$ dd if=fullbackup.bin of=loader.bin bs=65536 skip=216 count=1
$ dd if=fullbackup.bin of=fwconcat1.bin bs=65536 skip=217 count=22
$ cat fwconcat0.bin fwconcat1.bin > firmware.bin
Transfer firmware.bin and loader.bin to the OpenWrt device. First, flash
loader.bin to mtd device loader, then force sysupgrade:
$ mtd write loader.bin loader
$ sysupgrade -F firmware.bin
The reason for the two-step process is the way the flash layout is designed
for OpenWrt in contrast to the OEM firmware partition.
Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/17089
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The recently added AP15C dts file only differs by the definition of the
reset button. Unify the shared definition into a dtsi to reduce code
duplication.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://github.com/openwrt/openwrt/pull/16998
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This reverts commit 70e41d0205d95386881fa1cdf6ee00f6cca1b3f6.
"ethaddr" is stored into the "u-boot-env" (stock: "Config") partition
and it's quoted with double-quotations, but that format is not supported
by the current NVMEM u-boot-env driver (and mac_pton() function) and the
MAC address won't be parsed to byte array.
This causes random MAC addresses on the adapters, so revert the above
commit.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17116
Signed-off-by: Robert Marko <robimarko@gmail.com>
TP-Link CPE710-v2 is an outdoor wireless CPE for 5 GHz with one Ethernet
port based on the AP152 reference board. Compared to the CPE710-v1, the
only change observed in hardware is that the mdio address of the ethernet
physical changed from 0x4 to 0x0.
Specifications:
- SoC: QCA9563-AL3A MIPS 74kc @ 775MHz, AHB @ 258MHz
- RAM: 128MiB DDR2 @ 650MHz
- Flash: 16MiB SPI NOR Based on the GD25Q128
- Wi-Fi 5Ghz: ath10k chip (802.11ac for up to 867Mbps on 5GHz wireless
data rate), based on the QCA9896
- Ethernet: one 1GbE port
- 23dBi high-gain directional 2×2 MIMO parabolic antenna
- Power, LAN, WLAN5G Blue LEDs
Flashing instructions:
Flash factory image through stock firmware WEB UI or through TFTP
To get to TFTP recovery just hold reset button while powering on for around
30-40 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP address:192.168.0.254
Signed-off-by: Tim Noack <tim@noack.id>
Link: https://github.com/openwrt/openwrt/pull/16637
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is done in preparation of adding support for the CPE710-v2,
which uses a similiar device tree.
Signed-off-by: Tim Noack <tim@noack.id>
Link: https://github.com/openwrt/openwrt/pull/16637
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These get dynamically set based on compiler version. Not relevant for
targets.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16770
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
