Two patches declared as accepted in v6.13 were already accepted for
v6.12. Fix filenames and order of patches applied.
Reported-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Fixes: 8cc049cec2 ("generic: phy: aquantia: move accepted patches to backport-6.6")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport newly introduced support for 'active-high' property and use
it to correctly implement polarity assignment for Aquantia PHY LEDs.
Previously the 'active-low' property was used to switch a LED PIN to
active-high ("drive VDD" in Aquantia-speak) mode.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This solution that is needed for some routers to provide proper
LED activity when controlled directly by the MV88E6xxx switch,
has just been merged in upstream Linux.
Make this patch 901 as other backports from earlier kernels
are in patch 896 and this is the first free number after
that.
Patch offsets in pending patches are augmented as part of
the refresh.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Backport BLOCK OF support patch merged upstream and refresh pending
BLOCK patches.
This is a new way to declare partition table for BLOCK device (eMMC
currently supported) with the use of DTS.
Current pending patch are adapted to not cause regression with current
downstream implementation of a similar functionality.
Also enable the new OF_PARTITION config by default.
Link: https://github.com/openwrt/openwrt/pull/16663
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
There are cases where an unavailable port is not an error, making
this error message a false-positive. The kernel log is flooded with
the messages like:
OF: graph: no port node found in /soc@0/bus@42000000/i2c@42530000/usb-typec@50
Silence this message by making it a debug message.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/16524
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add support for W25N01JW, W25N02JWZEIF, W25N512GW, W25N02KWZEIR and W25N01GWZEIG.
Add support for W25N04KV.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/16272
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is a backport of netdev/net [1]/[2], expected to be in kernel 6.11
(if not backported to a stable branch).
Since 4fdc7bb8f1 (2024-06-14, switching ath79 from kernel 6.1 to 6.6),
the rtl8366s driver was made to write to bogus PHY MII registers on
ath79/netgear,wndr3800 and family, and likely on other systems using
this switch in a similar manner. The writes were directed to PHY 4 MII
registers 0x0d (13) and 0x0e (14). The rtl8366s data sheet claims these
registers are reserved. These register writes were causing the device to
not maintain link, track link status, or pass traffic on eth1 (labeled
WAN), as eth1 is connected to PHY 4.
0x0d is MII_MMD_CTRL, and 0x0e is MII_MMD_DATA. rtl8366s doesn't appear
to support MMD in any way, and certainly not via the IEEE 802.3 annex
22D "clause 45 over clause 22" protocol implemented by mmd_phy_indirect.
This patch intercepts those attempted register accesses and returns
-EOPNOTSUPP without touching the switch chip. This is implemented by
defining phy_driver::{read,write}_mmd as
genphy_{read,write}_mmd_unsupported for this PHY. A new PHY driver for
this PHY is introduced to achieve that, because this PHY was previously
using genphy_driver, and there is otherwise no clean way to declare lack
of support for these operations.
This was caused by kernel 9b01c885be36 (2023-02-13, in 6.3). The new
genphy_c45_read_eee_abilities call in genphy_read_abilities (called
during phy_probe) was causing an attempted MMD read of (MMIO_MMD_PCS,
MDIO_PCS_EEE_ABLE), which was transformed into an annex 22D
mmd_phy_indirect operation that performed MII register writes to
MII_MMD_CTRL, MII_MMD_DATA, and MII_MMD_CTRL again, followed by another
read from MII_MMD_DATA. This was enough to "scramble" the state of those
two MII registers, which are in fact not used for annex 22D MMD register
access on this device but are reserved and have some other function,
rendering the PHY unusable while so configured. The result of the
bungled MMD read attempt caused the genphy driver to incorrectly believe
that the PHY supported standard EEE, which led to several more attempted
MMD writes and reads, in turn being transformed into writes to these two
MII registers.
rtl8366s does support some pre-IEEE 802.3az EEE standard form of "Green
Ethernet" which the switch driver (local to OpenWrt) already has some
support for. No attempt is made to map the standard operations for this
device.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=225990c487c1
[2] https://lore.kernel.org/netdev/20240725204147.69730-1-mark@mentovai.com/
Fixes: https://github.com/openwrt/openwrt/issues/15981
Link: https://github.com/openwrt/openwrt/issues/15739
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Mark Mentovai <mark@mentovai.com>
Link: https://github.com/openwrt/openwrt/pull/16012
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Fix uninitialized variable warnings in function regcache_maple_drop
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/16004
Signed-off-by: Robert Marko <robimarko@gmail.com>
PMD Global Transmit Disable bit should be cleared for normal operation.
This should be HW default, however I found that on Asus RT-AX89X that uses
AQR113C PHY and firmware 5.4 this bit is set by default.
With this bit set the AQR cannot achieve a link with its link-partner and
it took me multiple hours of digging through the vendor GPL source to find
this out, so lets always clear this bit during .config_init() to avoid a
situation like this in the future.
aqr107_wait_processor_intensive_op() is moved up because datasheet notes
that any changes to this bit are processor intensive.
This is a modified version of patch that got merged upstream as AQR113C
has a separate config_init() upstream.
Link: https://github.com/openwrt/openwrt/pull/15840
Signed-off-by: Robert Marko <robimarko@gmail.com>
This backports the fix for the broken "nosmp" and "maxcpus=0" cmdline
params.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Link: https://github.com/openwrt/openwrt/pull/15811
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add patch implementing operations to get and set flow-control link
parameters of mtk_eth_soc via ethtool.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Now that the issue with WED has been sorted out, re-add support for
multiple PPE to the mtk_eth_soc driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Replace Aquantia pending LEDs patch with upstream version.
Sadly net maintainers didn't like integrated solution hence we still
need to handle LED restore on reset with custom solution.
Link: https://github.com/openwrt/openwrt/pull/15797
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport patch for G761 PWM Fan controller support. This is used by
an ipq807x RAX120v2 and have an internal clock that was currently
unconfigured making the device not working.
Link: https://github.com/openwrt/openwrt/pull/15796
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport upstream fix for incorrect ifdeffery and dependency of CONFIG_KEXEC,
which causes compilation errors with the following symbols:
CONFIG_CRASH_CORE=y
CONFIG_KEXEC_CORE=y
CONFIG_CRASH_DUMP=y
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
QCA808x does not currently fill in the possible_interfaces.
This leads to Phylink not being aware that it supports 2500Base-X as well
so in cases where it is connected to a DSA switch like MV88E6393 it will
limit that port to phy-mode set in the DTS.
That means that if SGMII is used you are limited to 1G only while if
2500Base-X was set you are limited to 2.5G only.
Populating the possible_interfaces fixes this, so lets backport the patches
from kernel 6.9.
This also includes a backport of the Phylink PHY validation series from
kernel 6.8 that allows the use of possible_interfaces.
Link: https://github.com/openwrt/openwrt/pull/15765
Signed-off-by: Robert Marko <robimarko@gmail.com>
Marvell Amethyst switches use a different SMI GPIO pin setup than other
switches, and since RB5009 uses Amethyst switch and its SMI bus to talk
to QCA8081 lets backport the required fix from kernel 6.9.
Link: https://github.com/openwrt/openwrt/pull/15765
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are some new commits, so refresh and update patches.
Some build warnings have been fixed upstream too.
Add backport target/linux/generic/backport-6.6/722-v6.10-dt-bindings-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch.
Removed upstream:
[-] qca-ssdk/patches/101-hsl_phy-add-support-for-detection-PSGMII-PHY-mode.patch
[-] qca-ssdk/patches/201-fix-compile-warnings.patch
List of changes:
2024-04-16 -c451136b- qca-ssdk: strip MRPPE code
2024-06-05 -f455a820- [qca-ssdk]: fix enum-int-mismatch warnings
2024-05-31 -bbfc0fa9- Merge "[qca-ssdk]: update eee status of phydev"
2024-05-31 -adbe9dc5- Merge "[qca-ssdk]: support psgmii and uqsxgmii mode of kernel"
2024-05-31 -d06ca777- Merge "[qca-ssdk]: fix 5G issue with the AQR FW that use 5gbaser for 5G speed"
2024-05-31 -c6f539a5- Merge "qca-ssdk: support mrppe pktedit padding functions"
2024-04-29 -c321e2a9- qca-ssdk: support mrppe pktedit padding functions
2024-05-24 -ee6e201e- qca-ssdk: Fix the big endian compile error
2024-05-15 -8c116bb9- [qca-ssdk]: update eee status of phydev
2024-05-20 -f0341a2c- Merge "qca-ssdk: Enable igmp for PPE MINI profile"
2024-05-16 -44a0ce93- qca-ssdk: Enable igmp for PPE MINI profile
2024-05-15 -8b91bbf6- [qca-ssdk]: support psgmii and uqsxgmii mode of kernel
2024-05-14 -7eec1658- [qca-ssdk]: fix 5G issue with the AQR FW that use 5gbaser for 5G speed
2024-05-12 -b9f5ea0e- [qca-ssdk]: ethtool support, do not change wake-up timer when the requested timer is 0
2024-05-09 -5e2c15ed- Merge "[qca-ssdk]: remove check when mht clock enable"
2024-05-09 -a1563b90- Merge "[qca-ssdk] support new sku IPQ5321"
2024-04-23 -f04b7680- [qca-ssdk]: show unknown status when link down
2024-03-22 -33b91b30- [qca-ssdk]: remove check when mht clock enable
2024-04-29 -b6362f2b- Merge "qca-ssdk:fix bug in marina nptv6 iid cal"
2024-04-29 -097033ae- Merge "[qca-ssdk] support cypress uniphy0 connecting MHT switch port0"
2024-04-24 -d45560fd- qca-ssdk:fix bug in marina nptv6 iid cal
2024-04-24 -7d7a42af- qca-ssdk: enable policer counter on low memory profile
2024-04-18 -e36cf6ea- Merge "[qca-ssdk]: change portvlan egress mode initial value as untouched"
2024-04-18 -27817881- Merge "[qca-ssdk]: update the aqr phy supported ability"
2024-04-18 -5a3a693c- Merge "qca-ssdk:support marina nptv6"
2024-04-16 -129fe9b3- Merge "qca-ssdk: support tunnel fields and innner fields inverse"
2024-01-09 -fc8f6abd- qca-ssdk:support marina nptv6
Signed-off-by: Kristian Skramstad <kristian+github@83.no>
Link: https://github.com/openwrt/openwrt/pull/15771
Signed-off-by: Robert Marko <robimarko@gmail.com>
