This adds a hotplug script for distributing interrupts of eth0 and eth1
across different cores. Otherwise the forwarding performance between
eth0 and eth1 is severely affected.
The existing SMP distribution mechanic in OpenWrt can't be used here, as
the actual device IRQ has to be moved to dedicated cores. In case of
eth1, this is in fact the USB3 controller.
Signed-off-by: David Bauer <mail@david-bauer.net>
Some rockchip SoCs like the RK3399 and RK3328 exhibit an issue
where tx checksumming does not work with packets larger than 1498.
The default Programmable Buffer Length for TX in these GMAC's is
not suitable for MTUs higher than 1498. The workaround is to disable
TX offloading with 'ethtool -K eth0 tx off rx off' causing performance
impacts as it disables hardware checksumming.
This patch sets snps,txpbl to 0x4 which is a safe number tested ok for
the most popular MTU value of 1500.
For reference, see https://lkml.org/lkml/2019/4/1/1382.
Signed-off-by: Carlos de Paula <me@carlosedp.com>
Link: https://lore.kernel.org/r/20200218221040.10955-1-me@carlosedp.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware
--------
RockChip RK3328 ARM64 (4 cores)
1GB DDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
USB 2.0 Port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
MAC-address
-----------
The vendor code supports reading a MAC address from an EEPROM connected
via i2c0 of the SoC. The EEPROM (address 0x51) should contain the MAC
address in binary at offset 0xfa. However, my two units didn't come with
such an EEPROM soldered on. The EEPROM should be placed between the SoC
and the GPIO pins on the board. (U10)
Generating rendom MAC addresses works around this issue. Otherwise, all
boards running the same image have identical MAC addresses.
Signed-off-by: David Bauer <mail@david-bauer.net>
Add support for select a bootscript depending on the device built. This
is necessary, as the FriendlyARM NanoPi R2S needs a different bootcmd in
order to produce output on the debug UART.
Signed-off-by: David Bauer <mail@david-bauer.net>
The timer LED trigger is enabled in all targets (except for lantiq
xway-legacy). It's necessary for the OpenWrt preinit LED pattern to
work.
Signed-off-by: David Bauer <mail@david-bauer.net>
Use the OpenWrt netlink GPIO button implementation to forward button
presses to procd. This is necessary to make failsafe-mode access
using a button possible.
Signed-off-by: David Bauer <mail@david-bauer.net>
Many target use a repetitive if-include scheme for their subtarget
image files, though their names are consistent with the subtarget
names.
This patch removes these redundant conditions and just uses the
variable for the include where the target setup allows it.
For sunxi, this includes a trivial rename of the subtarget image
Makefiles.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds the new rockchip target and support for RockPro64 RK3399
Flash: 16 MiB SPI NOR
RAM: 2 GiB/4 GiB LPDDR4
SoC: RK3399
USB: 2x USB 2.0, 1x USB 3.0, 1x USB-C
Ethernet: 1x GbE
PCIe: PCIe 2.0, 4 lanes
Storage: eMMC or SD card
Optional SDIO wifi/bt module
The Pine64 RockPro64 is a single-board-computer with a 4x PCIe connector,
6 ARM64 cores (4 little, 2 big), plenty of RAM and storage.
By default the single Gigabit-Ethernet port is configured as the
LAN port.
Installation of the firware is possible by dd'ing the image
to an SD card or the eMMC flash.
Serial: 3v3 1500000 8n1
U-boot is build from the mainline tree and
integrated into the images. Required ATF to build u-boot
is downloaded from a CI build bot.
Signed-off-by: Tobias Mädel <t.maedel@alfeld.de>
Tested-by: Tobias Schramm <t.schramm@manjaro.org>
