This patch converts ath10k calibration data to NVMEM format for
wave 1 devices with mtd binary MAC address. The "calibration"
NVMEM cell size is 0x844. The MAC addresses are assigned via dts.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Since the nvmem-based approach for retrieving MAC addresses
appears to depend on the addresses being set up after the
partitions, it is no longer possible to keep the MAC address
setup in shared DTSI files while the partitions itself are
set up in DTS files for the individual devices.
In ath79 the firmware partition is typically located somewhere
"in the middle" of the partition table. Thus, it's not trivial
to share the partitions containing MAC address information in
a common DTSI (like we did in some cases on ramips).
In this commit, MAC address setup is thus moved to the relevant
partitions, and in most cases needs to be duplicated. While
the duplication is not really nice, it eventually provides a
cleaner and more tidy setup, making the DTS(I) file
fragmentation a bit more logical. This should also help
with adding new devices, as information is distributed across
less locations.
For consistency, this commit also moves the mtd-cal-data property
"down" together with the MAC address setup, so it's not based
on a partition before the latter is defined either. (This is
only done for those files touched due to nvmem conversion.)
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The "/dts-v1/;" identifier is supposed to be present once at the
top of a device tree file after the includes have been processed.
In ath79, we therefore requested to have in the DTS files so far,
and omit it in the DTSI files. However, essentially the syntax of
the parent ath79.dtsi file already determines the DTS version, so
putting it into the DTS files is just a useless repetition.
Consequently, this patch puts the dts-v1 statement into the parent
ath79.dtsi, which is (indirectly) included by all DTS files. All
other occurences are removed.
Since the dts-v1 statement needs to be before any other definitions,
this also moves the includes to make sure the ath79.dtsi or its
descendants are always included first.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This applies several style adjustments that have been requested in
recent reviews to older DTS files. Despite making the code base more
consistent, this will also help to reduce review time when DTSes
are copy/pasted.
Applied changes:
- Rename gpio-keys/gpio-leds to keys/leds
- Remove node labels that are not used
- Use label property for partitions
- Prefix led node labels with "led_"
- Remove redundant includes
- Harmonize new lines after status property
- Several smaller style fixes
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Add some read-only properties to protect partitions from
accidental changes.
Also fixed two whitespaces error on the way.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Reverting this commit as I've missed the fact, that the button is
already present in the included DTSI file.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The GPIO for the reset button for the Archer C7v5 changed from
ar71xx to ath79. An investigation based on tests revealed
that the A7v5 responds on "11", while the C7v5 responds on
"5" as set for ar71xx.
Thus, we just define this in the DTS files instead of in the
common DTSI.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit adds support for TP-Link Archer C7 v5, leveraging most effort
from commit ea9baee and 1e4ee63. Archer C7 v5 is identical to Archer A7 v5
but with a different flash layout.
Specification:
- QCA9563 SoC (750 MHz)
- 128 MiB of RAM (DDR2)
- 16 MiB of flash (SPI)
- 5x 1 Gbps Ethernet (1x WAN + 4x LAN)
- 2.4GHz (bgn) SoC internal + 5GHz (ac) QCA9880
- 10x LED, 2x button
- UART header on PCB
Flash instructions:
1. Upload openwrt-ath79-generic-tplink_archer-c7-v5-squashfs-factory.bin
via web interface.
Flash instructions using TFTP recovery:
1. Plug PC to one of the LAN ports
2. Set PC to fixed IP address 192.168.0.66
3. Rename the factory image to ArcherC7v5_tp_recovery.bin and place it in
TFTP root directory
4. Turn on the router with the reset button pressed for about 15 secs
5. Release the button and wait about 150 secs to complete flashing
Signed-off-by: TOCK Chiu <tock.chiu@gmail.com>
